ATMEGA8515L-8MUR Atmel, ATMEGA8515L-8MUR Datasheet - Page 166

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ATMEGA8515L-8MUR

Manufacturer Part Number
ATMEGA8515L-8MUR
Description
MCU AVR 8KB FLASH 8MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA8515L-8MUR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Boot Loader Support
– Read-While-Write
Self-Programming
Features
Application and Boot
Loader Flash Sections
Application Section
BLS – Boot Loader Section
Read-While-Write and No
Read-While-Write Flash
Sections
166
ATmega8515(L)
The Boot Loader Support provides a real Read-While-Write Self-Programming mecha-
nism for downloading and uploading program code by the MCU itself. This feature
allows flexible application software updates controlled by the MCU using a Flash-resi-
dent Boot Loader program. The Boot Loader program can use any available data
interface and associated protocol to read code and write (program) that code into the
Flash memory, or read the code from the Program memory. The program code within
the Boot Loader section has the capability to write into the entire Flash, including the
Boot Loader memory. The Boot Loader can thus even modify itself, and it can also
erase itself from the code if the feature is not needed anymore. The size of the Boot
Loader memory is configurable with fuses and the Boot Loader has two separate sets of
Boot Lock bits which can be set independently. This gives the user a unique flexibility to
select different levels of protection.
Note:
The Flash memory is organized in two main sections, the Application section and the
Boot Loader section (see Figure 73). The size of the different sections is configured by
the BOOTSZ Fuses as shown in Table 78 on page 177 and Figure 73. These two sec-
tions can have different level of protection since they have different sets of Lock bits.
The Application section is the section of the Flash that is used for storing the application
code. The protection level for the Application section can be selected by the application
Boot Lock bits (Boot Lock bits 0), see Table 74 on page 169. The Application section
can never store any Boot Loader code since the SPM instruction is disabled when exe-
cuted from the Application section.
While the Application section is used for storing the application code, the Boot Loader
software must be located in the BLS since the SPM instruction can initiate a program-
ming when executing from the BLS only. The SPM instruction can access the entire
Flash, including the BLS itself. The protection level for the Boot Loader section can be
selected by the Boot Loader Lock bits (Boot Lock bits 1), see Table 75 on page 169.
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot
Loader software update is dependent on which address that is being programmed. In
addition to the two sections that are configurable by the BOOTSZ Fuses as described
above, the Flash is also divided into two fixed sections, the Read-While-Write (RWW)
section and the No Read-While-Write (NRWW) section. The limit between the RWW-
and NRWW sections is given in Table 79 on page 177 and Figure 73 on page 168. The
main difference between the two sections is:
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
When erasing or writing a page located inside the RWW section, the NRWW section
can be read during the operation.
When erasing or writing a page located inside the NRWW section, the CPU is halted
during the entire operation.
1. A page is a section in the Flash consisting of several bytes (see Table 89 on page
183
operation.
)
used during programming. The page organization does not affect normal
(1)
Size
2512K–AVR–01/10

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