ATMEGA8515L-8MUR Atmel, ATMEGA8515L-8MUR Datasheet - Page 158
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ATMEGA8515L-8MUR
Manufacturer Part Number
ATMEGA8515L-8MUR
Description
MCU AVR 8KB FLASH 8MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8515L-8MC.pdf
(257 pages)
Specifications of ATMEGA8515L-8MUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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ATmega8515(L)
Table 64. UPM Bits Settings
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 65. USBS Bit Settings
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits
(character size) in a frame the Receiver and Transmitter use.
Table 66. UCSZ Bits Settings
• Bit 0 – UCPOL: Clock Polarity
This bit is used for Synchronous mode only. Write this bit to zero when Asynchronous
mode is used. The UCPOL bit sets the relationship between data output change and
data input sample, and the synchronous clock (XCK).
Table 67. UCPOL Bit Settings
UCPOL
0
1
UCSZ2
UPM1
0
0
0
0
1
1
1
1
0
0
1
1
Transmitted Data Changed
(Output of TxD Pin)
Rising XCK Edge
Falling XCK Edge
USBS
0
1
UCSZ1
UPM0
0
0
1
1
0
0
1
1
0
1
0
1
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
UCSZ0
0
1
0
1
0
1
0
1
Received Data Sampled
(Input on RxD Pin)
Falling XCK Edge
Rising XCK Edge
Stop Bit(s)
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
1-bit
2-bit
2512K–AVR–01/10
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