AT90PWM81-16MF Atmel, AT90PWM81-16MF Datasheet - Page 42
AT90PWM81-16MF
Manufacturer Part Number
AT90PWM81-16MF
Description
IC MCU AVR 8K FLASH ISP 32QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM81-16MN.pdf
(325 pages)
Specifications of AT90PWM81-16MF
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
20
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-MLF®, QFN
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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5.5.6
42
AT90PWM81
Clock Selection Register - CLKSELR
• Bits 3:0 – CLKC3:0: Clock Control Bits 3 - 0
These bits define the command to provide to the ‘Clock Switch’ module. The special write procedure must
be followed to change the CLKC bits
41.).
Interrupts should be disabled when setting CLKCSR register in order not to disturb the procedure.
Table 5-12.
• Bit 7– Res: Reserved Bit
This bit is reserved bit in the AT90PWM81 and will always read as zero.
• Bit 6 – COUT: Clock Out
The COUT bit is initialized with CKOUT Fuse bit.
The COUT bit is only used in case of ‘CKOUT’ command. Refer to
on page 34
In case of ‘Recover System Clock Source’ command, COUT it is not affected (no recovering of this
setting).
• Bits 5:4 – CSUT1:0: Clock Start-up Time
CSUT bits are initialized with the values of SUT Fuse bits.
In case of ‘Enable/Disable Clock Source’ command, CSUT field provides the code of the clock start-up
time. Refer to subdivisions of
In case of ‘Recover System Clock Source’ command, CSUT field is not affected (no recovering of SUT
code).
Bit
Read/Write
Initial Value
Clock Command
No command
Disable clock source
Enable clock source
Request for clock
Clock source switch
Recover system clock source code
CKOUT command
No command
1.
2.
Write the Clock Control Change Enable (CLKCCE) bit to one and all other bits in
CLKCSR to zero.
Within 4 cycles, write the desired value to CLKCSR register while clearing CLKCCE bit.
for using.
Clock command list.
R
7
0
availability
-
CKOUT
COUT
R/W
fuse
6
Section 5.2 ”Clock Sources” on page 28
CSUT1
R/W
5
(See ”Bit 7 – CLKCCE: Clock Control Change Enable” on page
SUT1..0
fuses
CSUT0
R/W
4
CSEL3
R/W
3
CSEL2
R/W
2
Section 5.2.7 ”Clock Output Buffer”
CKSEL3..0
for code of clock start-up times.
fuses
CSEL1
R/W
1
CSEL0
R/W
0
CLKC3..0
7734P–AVR–08/10
0000
0001
0010
0100
0101
1xxx
0011
0111
CLKSELR
b
b
b
b
b
b
b
b
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