PIC16F688-I/ST Microchip Technology, PIC16F688-I/ST Datasheet - Page 31
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PIC16F688-I/ST
Manufacturer Part Number
PIC16F688-I/ST
Description
IC PIC MCU FLASH 4KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
6.PIC16F688-EP.pdf
(174 pages)
Specifications of PIC16F688-I/ST
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F688-I/ST
Manufacturer:
TI
Quantity:
2 748
Part Number:
PIC16F688-I/ST
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
3.7.1
The Fail-Safe condition is cleared after a Reset, the
execution of a SLEEP instruction, or a modification of
the SCS bit. While in Fail-Safe condition, the
PIC16F688 uses the internal oscillator as the system
clock source. The IRCF bits (OSCCON<6:4>) can be
modified to adjust the internal oscillator frequency
without exiting the Fail-Safe condition.
The Fail-Safe condition must be cleared before the
OSFIF flag can be cleared.
FIGURE 3-9:
3.7.2
The FSCM is designed to detect oscillator failure at
any point after the device has exited a Reset or Sleep
condition and the Oscillator Start-up Timer (OST) has
expired. If the external clock is EC or RC mode,
monitoring will begin immediately following these
events.
For LP, XT or HS mode the external oscillator may
require a start-up time considerably longer than the
FSCM sample clock time, a false clock failure may be
detected (see Figure 3-9). To prevent this, the internal
oscillator is automatically configured as the system
clock and functions until the external clock is stable
(the OST has timed out). This is identical to
Two-Speed
oscillator is stable, the LFINTOSC returns to its role as
the FSCM source.
2004 Microchip Technology Inc.
Note:
Sample Clock
Note:
CM Output
OSCFIF
System
FAIL-SAFE CONDITION CLEARING
Output
RESET OR WAKE-UP FROM SLEEP
Due to the wide range of oscillator start-up
times, the Fail-Safe circuit is not active
during oscillator start-up (i.e., after exiting
Reset or Sleep). After an appropriate
amount of time, the user should check the
OSTS bit (OSCCON<3>) to verify the
oscillator start-up and system clock
switchover has successfully completed.
Clock
Start-up
(Q)
The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
FSCM TIMING DIAGRAM
mode.
Once
CM Test
the
external
Preliminary
CM Test
Oscillator
Failure
Detected
PIC16F688
Failure
CM Test
DS41203B-page 29