AT89S52-24JU Atmel, AT89S52-24JU Datasheet - Page 5
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AT89S52-24JU
Manufacturer Part Number
AT89S52-24JU
Description
IC MCU 8K FLASH 24MHZ 44-PLCC
Manufacturer
Atmel
Series
89Sr
Datasheet
1.AT89S52-24AU.pdf
(38 pages)
Specifications of AT89S52-24JU
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89S
Maximum Speed
24 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
256 B
Maximum Clock Frequency
33 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
32
Interface
UART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
8K Bytes
Timers
3-16-bit
Voltage, Range
4-5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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3 400
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Manufacturer:
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20 000
4.6
4.7
4.8
1919D–MICRO–6/08
Port 3
RST
ALE/PROG
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-
nal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low
will source current (I
Port 3 receives some control signals for Flash programming and verification.
Port 3 also serves the functions of various special features of the AT89S52, as shown in the fol-
lowing table.
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO
bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit
DISRTO, the RESET HIGH out feature is enabled.
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be
used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-
ing each access to external data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set,
ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.
Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
Port Pin
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
IL
) because of the pull-ups.
Alternate Functions
RXD (serial input port)
TXD (serial output port)
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (timer 0 external input)
T1 (timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
AT89S52
5