PIC12LC671-04I/P Microchip Technology, PIC12LC671-04I/P Datasheet - Page 40
![IC MCU OTP 1KX14 LV A/D 8DIP](/photos/16/0/160065/8-pdip-angled-300dpi-lyrd_sml.jpg)
PIC12LC671-04I/P
Manufacturer Part Number
PIC12LC671-04I/P
Description
IC MCU OTP 1KX14 LV A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Specifications of PIC12LC671-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
PIC12LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8
For Use With
309-1051 - ADAPTER 8-DIP BD W/2 SO PLUGS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC12C67X
FIGURE 7-3:
FIGURE 7-4:
DS30561B-page 40
Instruction
PC
(Program
Counter)
Fetch
Instruction
Execute
TMR0
OSC1
CLKOUT
Timer0
T0IF bit
(INTCON<2>)
GIE bit
(INTCON<7>)
INSTRUCTION
FLOW
Note 1:
Instruction
fetched
Instruction
executed
2:
3:
(3)
PC
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt flag bit T0IF is sampled here (every Q1).
Interrupt latency = 3T
CLKOUT is available only in the INTRC and EXTRC oscillator modes.
T0
Q1
PC-1
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
TIMER0 INTERRUPT TIMING
FEh
Inst (PC)
Inst (PC-1)
Q2
1
PC
MOVWF TMR0 MOVF TMR0,WMOVF TMR0,WMOVF TMR0,WMOVF TMR0,WMOVF TMR0,W
Q3
PC
T0+1
Q4
CY
where T
Q1
FFh
Write TMR0
executed
Inst (PC+1)
PC+1
Inst (PC)
Q2
1
PC +1
CY
= instruction cycle time.
Q3
Read TMR0
reads NT0
Q4
PC+2
Q1
Interrupt Latency
00h
Dummy cycle
Q2
PC +1
Read TMR0
reads NT0
PC+3
Q3
NT0
(2)
Q4
Read TMR0
reads NT0
Q1
PC+4
01h
Dummy cycle
Inst (0004h)
Q2
0004h
Q3
Read TMR0
reads NT0
1999 Microchip Technology Inc.
PC+5
Q4
Q1
02h
Read TMR0
reads NT0 + 1
Inst (0004h)
Inst (0005h)
NT0+1
Q2
0005h
PC+6
Q3
Q4