PIC16LF648A-I/P Microchip Technology, PIC16LF648A-I/P Datasheet - Page 73

• Manufacturer Part Number: PIC16LF648A-I/P
• Description: IC PIC MCU FLASH 4KX14 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF648A-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.1
The BRG supports both the Asynchronous and
Synchronous modes of the USART. It is a dedicated 8-
bit baud rate generator. The SPBRG register controls
the period of a free running 8-bit timer. In Asynchro-
nous mode bit BRGH (TXSTA<2>) also controls the
baud rate. In Synchronous mode bit BRGH is ignored.
Table 12-1 shows the formula for computation of the
baud rate for different USART modes, which only apply
in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
TABLE 12-1:
TABLE 12-2:
 2004 Microchip Technology Inc.
Legend: X = value in SPBRG (0 to 255)
Legend: x = unknown, - = unimplemented read as ‘0’.
Address
SYNC
98h
18h
99h
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
0
1
USART Baud Rate Generator
(BRG)
= 16 MHz
Shaded cells are not used by the BRG.
SPBRG
RCSTA
Name
TXSTA
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
CSRC
SPEN
Bit 7
Bit 6
BRGH = 0 (Low Speed)
RX9
TX9
OSC
SREN
TXEN
Bit 5
, the nearest
Baud Rate Generator Register
CREN
SYNC
Bit 4
Preliminary
OSC
OSC
PIC16F627A/628A/648A
/(64(X+1))
/(4(X+1))
ADEN
Bit 3
—
EXAMPLE 12-1:
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register, causes the
BRG timer to be Reset (or cleared), this ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
BRGH
FERR
Error
Bit 2
Calculated Baud Rate
=
(Calculated Baud Rate - Desired Baud Rate)
--------------------------------------------------------------------------------------------------------- -
TRMT
OERR
Bit 1
Desired Baud Rate
OSC
=
9615 9600
----------------------------- -
/(16(X + 1)) equation can reduce the
9600
Baud Rate= F
TX9D
RX9D
Bit 0
BRGH = 1 (High Speed)
9600
x
CALCULATING BAUD
RATE ERROR
Desired Baud Rate
–
=
=
25.042
16000000
----------------------- -
64 x
=
0000 -010
0000 000x
0000 0000
Value on
------------------------- -
64 25
16000000
=
POR
=
NA
+
0.16%
OSC
---------------------- -
64 x
1
Fosc
+
DS40044B-page 71
/(16(X+1))
1
+
1
Value on all
=
0000 -010
0000 000x
0000 0000
9615
Resets
other