PIC16LF648A-I/P Microchip Technology, PIC16LF648A-I/P Datasheet - Page 48

• Manufacturer Part Number: PIC16LF648A-I/P
• Description: IC PIC MCU FLASH 4KX14 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF648A-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F627A/628A/648A
6.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. A prescaler assignment for the Timer0 module
means that there is no postscaler for the Watchdog
Timer, and vice-versa.
FIGURE 6-1:
DS40044B-page 46
WDT ENABLE BIT
WATCHDOG
T0CKI
PIN
TIMER
Timer0 Prescaler
Note:
F
OSC
/4
T0SE, T0CS, PSA, PS0-PS2 are bits in the Option Register.
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT
TMR1 Clock Source
PSA
0
1
.
T0CS
0
1
WDT POSTSCALER/
TMR0 PRESCALER
8-TO-1MUX
Preliminary
8
PSA
PSA
1
0
1
0
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing
MOVWF 1,
prescaler. When assigned to WDT, a CLRWDT instruc-
tion will clear the prescaler along with the Watchdog
Timer. The prescaler is not readable or writable.
TIME OUT
WDT
to
CYCLES
PS0 - PS2
SYNC
2
the
BSF 1,
TMR0
 2004 Microchip Technology Inc.
x....etc.) will clear the
TMR0 REG
DATA BUS
register
8
SET FLAG BIT T0IF
ON OVERFLOW
(e.g.,
CLRF 1,