PIC16C712-20/P Microchip Technology, PIC16C712-20/P Datasheet - Page 37

• Manufacturer Part Number: PIC16C712-20/P
• Description: IC MCU OTP 1KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C712-20/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Number Of I /o: 13
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

6.1
Timer2 can be used as the PWM time-base for PWM
mode of the CCP module.
The TMR2 register is readable and writable, and is
cleared on any device reset.
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device reset (Power-on Reset, MCLR reset,
TMR2 is not cleared when T2CON is written.
TABLE 6-1
Address
0Bh,8Bh
0Ch
8Ch
11h
12h
92h
Legend:
Watchdog Timer reset, or Brown-out Reset)
1999 Microchip Technology Inc.
or
Timer2 Operation
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer2 module.
Name
INTCON
PIR1
PIE1
TMR2
T2CON
PR2
1:16,
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
OSC
Timer2 module’s register
Timer2 Period Register
selected
/4) has a prescale option of 1:1,
Bit 7
GIE
—
—
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
ADIE
Bit 6
PEIE
ADIF
by
control
Bit 5
T0IE
—
—
INTE
Preliminary
bits
Bit 4
—
—
RBIE
Bit 3
—
—
6.2
The Timer2 module has an 8-bit period register PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is ini-
tialized to FFh upon reset.
CCP1IF
CCP1IE
Bit 2
T0IF
Timer2 Interrupt
TMR2IF
TMR2IE
PIC16C712/716
Bit 1
INTF
TMR1IF
TMR1IE
RBIF
Bit 0
0000 000x 0000 000u
-00- -000 0000 -000
-0-- -000 0000 -000
0000 0000 0000 0000
1111 1111 1111 1111
Value on
POR,
BOR
DS41106A-page 37
Value on
all other
resets