PIC16F883-E/SS Microchip Technology, PIC16F883-E/SS Datasheet - Page 219
![IC PIC MCU FLASH 4KX14 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F883-E/SS
Manufacturer Part Number
PIC16F883-E/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F883-E/SS
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-3
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1631RD-MCC2 - REFERENCE DESIGN MCP1631HV
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- MCP1631RD-MCC2 PDF datasheet #2
- PIC16F882-ISS PDF datasheet #3
- PIC16F882-ISS PDF datasheet #4
- PIC16F883-ISO PDF datasheet #5
- Current page: 219 of 288
- Download datasheet (5Mb)
14.3.2
An overflow (FFh → 00h) in the TMR0 register will set
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 “Timer0 Module” for operation of
the Timer0 module.
FIGURE 14-7:
© 2007 Microchip Technology Inc.
IOC-RB0
IOC-RB1
IOC-RB2
IOC-RB3
IOC-RB4
IOC-RB5
IOC-RB6
IOC-RB7
IOCB0
IOCB1
IOCB2
IOCB3
IOCB4
IOCB5
IOCB6
IOCB7
TIMER0 INTERRUPT
INTERRUPT LOGIC
ULPWUIF
ULPWUIE
TMR2IE
TMR1IF
TMR1IE
TMR2IF
CCP1IF
CCP1IE
CCP2IF
CCP2IE
BCLIF
BCLIE
OSFIF
OSFIE
SSPIF
SSPIE
RCIE
RCIF
ADIF
ADIE
TXIF
TXIE
C1IF
C1IE
C2IF
C2IE
EEIF
EEIE
PIC16F882/883/884/886/887
Preliminary
14.3.3
An input change on PORTB change sets the RBIF
(INTCON<0>) bit. The interrupt can be enabled/
disabled by setting/clearing the RBIE (INTCON<3>)
bit. Plus, individual pins can be configured through the
IOCB register.
Note:
Note 1:
RBIE
INTF
INTE
RBIF
PEIE
T0IF
T0IE
GIE
PORTB INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RBIF inter-
rupt
Section 3.4.3 “Interrupt-on-Change” for
more information.
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See Section 14.6.1
“Wake-up from Sleep”.
flag
Wake-up (If in Sleep mode)
may
not
DS41291D-page 217
Interrupt to CPU
get
set.
(1)
See
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