PIC16F883-E/SS Microchip Technology, PIC16F883-E/SS Datasheet - Page 122
![IC PIC MCU FLASH 4KX14 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F883-E/SS
Manufacturer Part Number
PIC16F883-E/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F883-E/SS
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-3
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1631RD-MCC2 - REFERENCE DESIGN MCP1631HV
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- MCP1631RD-MCC2 PDF datasheet #2
- PIC16F882-ISS PDF datasheet #3
- PIC16F882-ISS PDF datasheet #4
- PIC16F883-ISO PDF datasheet #5
- Current page: 122 of 288
- Download datasheet (5Mb)
PIC16F882/883/884/886/887
10.3
Depending on the application, good programming
practice may dictate that the value written to the data
EEPROM should be verified (see Example 10-5) to the
desired value to be written.
EXAMPLE 10-5:
10.3.1
The data EEPROM is a high-endurance, byte
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated often).
When variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the
EEPROM (specification D124) without exceeding the
total number of write cycles to a single byte
(specifications D120 and D120A). If this is the case,
then a refresh of the array must be performed. For this
reason, variables that change infrequently (such as
constants, IDs, calibration, etc.) should be stored in
Flash program memory.
10.4
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
10.5
Data memory can be code-protected by programming
the CPD bit in the Configuration Word Register 1
(Register 14-1) to ‘0’.
DS41291D-page 120
BANKSEL EEDAT
MOVF
BANKSEL EECON1
BSF
BANKSEL EEDAT
XORWF
BTFSS
GOTO
:
BCF
Write Verify
Protection Against Spurious Write
Data EEPROM Operation During
Code-Protect
EEDAT, W
EECON1, RD
EEDAT, W
STATUS, Z
WRITE_ERR
STATUS, RP1
USING THE DATA EEPROM
Timer
WRITE VERIFY
(64 ms
;
;EEDAT not changed
;from previous write
;
;YES, Read the
;value written
;
;
;Is data the same
;No, handle error
;Yes, continue
;Bank 0
duration)
prevents
Preliminary
When the data memory is code-protected, only the
CPU is able to read and write data to the data
EEPROM. It is recommended to code-protect the pro-
gram memory when code-protecting data memory.
This prevents anyone from programming zeroes over
the existing code (which will execute as NOPs) to reach
an added routine, programmed in unused program
memory, which outputs the contents of data memory.
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
© 2007 Microchip Technology Inc.
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