AT89LP428-20MH Atmel, AT89LP428-20MH Datasheet - Page 19
AT89LP428-20MH
Manufacturer Part Number
AT89LP428-20MH
Description
MCU 8051 4K FLASH SPI 32VQFN
Manufacturer
Atmel
Series
89LPr
Datasheet
1.AT89LP428-20AU.pdf
(149 pages)
Specifications of AT89LP428-20MH
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Processor Series
AT89x
Core
8051
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
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3654A–MICRO–8/09
Table 5-3.
Table 5-4.
Symbol
DPU1
DPU0
DPD1
DPD0
SIGEN
DPS
DPD1
0
0
1
1
DPCF = A2H
Not Bit Addressable
Bit
Function
Data Pointer 1 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use
DPTR1 will also update DPTR1 based on DPD1. If DPD1 = 0, the operation is post-
increment and if DPD1 = 1 the operation is post-decrement. When DPU1 = 0, DPTR1 is
not updated.
Data Pointer 0 Update. When set, MOVX @DPTR and MOVC @DPTR instructions that use
DPTR0 will also update DPTR0 based on DPD0. If DPD0 = 0, the operation is post-
increment and if DPD0 = 1, the operation is post-decrement. When DPU0 = 0, DPTR0 is
not updated.
Data Pointer 1 Decrement. When set, INC DPTR instructions targeted to DPTR1 will
decrement DPTR1. When cleared, INC DPTR instructions will increment DPTR1.
Data Pointer 0 Decrement. When set, INC DPTR instructions targeted to DPTR0 will
decrement DPTR0. When cleared, INC DPTR instructions will increment DPTR0.
Signature Enable. When SIGEN = 1, all MOVC @DPTR instructions and all IAP accesses
will target the signature array memory. When SIGEN = 0, all MOVC and IAP accesses target
CODE memory.
Data Pointer Select. DPS selects the active data pointer for instructions that reference
DPTR. When DPS = 0, DPTR will target DPTR0 and /DPTR will target DPTR1. When
DPS = 1, DPTR will target DPTR1 and /DPTR will target DPTR0.
DPD0
DPU1
DPTR Auto-update
DPCF
0
1
0
1
7
– Data Pointer Configuration Register
DPU0
6
DPTR0++
DPTR0++
DPTR0--
DPTR0--
DPTR
Operation for MOVX and MOVC (DPU1 = 1 & DPU0 = 1)
DPD1
5
DPS = 0
DPD0
DPTR1++
DPTR1++
DPTR1--
DPTR1--
/DPTR
4
SIGEN
3
DPTR1++
DPTR1++
DPTR1--
DPTR1--
DPTR
AT89LP428/828
0
2
Reset Value = 0000 00X0B
DPS = 1
–
1
DPTR0++
DPTR0++
DPTR0--
DPTR0--
/DPTR
DPS
0
19
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