PIC16F722-I/SO Microchip Technology, PIC16F722-I/SO Datasheet - Page 95
![IC PIC MCU FLASH 2KX14 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16F722-I/SO
Manufacturer Part Number
PIC16F722-I/SO
Description
IC PIC MCU FLASH 2KX14 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.AC164112.pdf
(302 pages)
2.PIC16F722-ISS.pdf
(8 pages)
3.PIC16F722-ISS.pdf
(10 pages)
4.PIC16F722-ISS.pdf
(32 pages)
5.PIC16F722-ISS.pdf
(2 pages)
6.PIC16F722-ISS.pdf
(8 pages)
7.PIC16LF724-EP.pdf
(266 pages)
Specifications of PIC16F722-I/SO
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 8-bit
Controller Family/series
PIC16F
No. Of I/o's
25
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPICE2000 - EMULATOR MPLAB-ICE 2000 POD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F722-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AC164112 PDF datasheet
- PIC16F722-ISS PDF datasheet #2
- PIC16F722-ISS PDF datasheet #3
- PIC16F722-ISS PDF datasheet #4
- PIC16F722-ISS PDF datasheet #5
- PIC16F722-ISS PDF datasheet #6
- PIC16LF724-EP PDF datasheet #7
- Current page: 95 of 302
- Download datasheet (5Mb)
8.0
Device Configuration consists of Configuration Word 1
and Configuration Word 2 registers, Code Protection
and Device ID.
REGISTER 8-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
Note 1:
U-1
—
—
2:
3:
4:
(4)
DEVICE CONFIGURATION
Enabling Brown-out Reset does not automatically enable Power-up Timer.
The entire program memory will be erased when the code protection is turned off.
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
MPLAB
DEBUG: In-Circuit Debugger Mode bit
1 = In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
0 = In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger
PLLEN: INTOSC PLL Enable bit
0 = INTOSC Frequency is 500 kHz
1 = INTOSC Frequency is 16 MHz (32x)
Unimplemented: Read as ‘1’
BORV: Brown-out Reset Voltage selection bit
0 = Brown-out Reset Voltage (V
1 = Brown-out Reset Voltage (V
BOREN<1:0>: Brown-out Reset Selection bits
0x = BOR disabled (Preconditioned State)
10 = BOR enabled during operation and disabled in Sleep
11 = BOR enabled
Unimplemented: Read as ‘1’
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: RE3/MCLR pin function select bit
1 = RE3/MCLR pin function is MCLR
0 = RE3/MCLR pin function is digital input, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
®
IDE masks unimplemented Configuration bits to ‘0’.
R/P-1
CP
—
CONFIG1: CONFIGURATION WORD REGISTER 1
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
DEBUG
MCLRE
R/P-1
R/P-1
(2)
BOR
BOR
PWRTE
) set to 2.5 V nominal
) set to 1.9 V nominal
PLLEN
R/P-1
R/P-1
(3)
PIC16F72X/PIC16LF72X
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTE
8.1
There are several Configuration Word bits that allow
different oscillator and memory protection options.
These are implemented as Configuration Word 1
register at 2007h and Configuration Word 2 register at
2008h. These registers are only accessible during
programming.
U-1
R/P-1
—
(4)
Configuration Words
DD
FOSC2
BORV
R/P-1
R/P-1
x = Bit is unknown
BOREN1
FOSC1
R/P-1
R/P-1
DS41341E-page 95
BOREN0
FOSC0
R/P-1
R/P-1
bit 8
bit 0
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