ATMEGA48PA-PU Atmel, ATMEGA48PA-PU Datasheet - Page 299
ATMEGA48PA-PU
Manufacturer Part Number
ATMEGA48PA-PU
Description
MCU AVR 4KB FLASH IND 28PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48PA-PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
On-chip Dac
10 bit, 6 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA48PA-PU
Manufacturer:
ON
Quantity:
21 000
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8271C–AVR–08/10
Table 27-7.
Notes:
Table 27-8.
Notes:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
High Fuse Byte
WDTON
EESAVE
BODLEVEL2
BODLEVEL1
BODLEVEL0
High Fuse Byte
RSTDISBL
DWEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
(2)
1. See
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See
4. See
1. See
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See
4. The default value of BOOTSZ[1:0] results in maximum Boot Size. See
(3)
(3)
(1)
page
(4)
(4)
(4)
Fuse High Byte for ATmega48A/48PA/88A/88PA/168A/168PA (Continued)
Fuse High Byte for ATmega328/328P
”Alternate Functions of Port C” on page 86
”WDTCSR – Watchdog Timer Control Register” on page 55
Table 28-13 on page 323
”Alternate Functions of Port C” on page 86
”WDTCSR – Watchdog Timer Control Register” on page 55
303.
Bit No
Bit No
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
Watchdog Timer Always On
EEPROM memory is
preserved through the Chip
Erase
Brown-out Detector trigger
level
Brown-out Detector trigger
level
Brown-out Detector trigger
level
Description
External Reset Disable
debugWIRE Enable
Enable Serial Program and
Data Downloading
Watchdog Timer Always On
EEPROM memory is
preserved through the Chip
Erase
Select Boot Size
(see
Table 26-7 on page
Table 26-10 on page 292
Table 26-13 on page 293
for details)
Select Boot Size
(see
Table 26-7 on page
Table 26-10 on page 292
Table 26-13 on page 293
for details)
Select Reset Vector
for BODLEVEL Fuse decoding.
for description of RSTDISBL Fuse.
for description of RSTDISBL Fuse.
291,
291,
and
and
Default Value
1 (unprogrammed)
1 (unprogrammed), EEPROM
not reserved
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Default Value
1 (unprogrammed)
1 (unprogrammed)
0 (programmed, SPI
programming enabled)
1 (unprogrammed)
1 (unprogrammed), EEPROM
not reserved
0 (programmed)
0 (programmed)
1 (unprogrammed)
for details.
for details.
”Pin Name Mapping” on
(4)
(4)
299
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