PIC16F785-E/P Microchip Technology, PIC16F785-E/P Datasheet - Page 22

• Manufacturer Part Number: PIC16F785-E/P
• Description: IC PIC MCU FLASH 2KX14 20DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• For Use With: AC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOICDM163029 - BOARD PICDEM FOR MECHATRONICSACICE0203 - MPLABICE 20P 300 MIL ADAPTER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -

PIC16F785/HV785
4.0
The PIC16F785/HV785 has several Configuration bits.
These bits can be programmed (reads ‘0’) or left
unchanged (reads ‘1’) to select various device
configurations.
REGISTER 4-1:
DS41237D-page 22
bit 13
bit 6
Legend:
R = Readable bit
-n = Value at POR
bit 13-12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
R/P-1
CP
U-1
–
(2)
CONFIGURATION WORD
Unimplemented: Read as ‘1’
FCMEN: Fail-Safe Clock Monitor Enabled bit
IESO: Internal External Switchover bit
BOREN<1:0>: Brown-out Reset Selection bits
CPD: Data Code Protection bit
CP: Code Protection bit
MCLRE: RA3/MCLR pin function select bit
PWRTE: Power-up Timer Enable bit
WDTE: Watchdog Timer Enable bit
MCLRE
R/P-1
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
1 = Internal External Switchover mode is enabled
0 = Internal External Switchover mode is disabled
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit (PCON<4>)
00 = BOR disabled
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
1 = RA3/MCLR pin function is MCLR
0 = RA3/MCLR pin function is digital input, MCLR internally tied to V
1 = PWRT disabled
0 = PWRT enabled
1 = WDT enabled
0 = WDT disabled and can be enabled by SWDTEN bit (WDTCON<0>)
U-1
–
CONFIG: CONFIGURATION WORD (ADDRESS: 2007h)
(4)
W = Writable bit
‘1’ = Bit is set
FCMEN
(2)
PWRTE
R/P-1
R/P-1
(5)
(2,3)
(5)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(4)
WDTE
(5)
R/P-1
R/P-1
IESO
(1)
(5)
BOREN1
FOSC2
R/P-1
R/P-1
(1)
DD
BOREN0
x = Bit is unknown
 2009 Microchip Technology Inc.
FOSC1
R/P-1
R/P-1
(1)
CPD
FOSC0
R/P-1
R/P-1
(2,3)
bit 7
bit 0