ATTINY43U-SUR Atmel, ATTINY43U-SUR Datasheet - Page 154
ATTINY43U-SUR
Manufacturer Part Number
ATTINY43U-SUR
Description
MCU AVR 4KB FLASH 8MHZ 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY43U-SU.pdf
(182 pages)
Specifications of ATTINY43U-SUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 19-16. Serial Programming Instruction Set (Continued)
Figure 19-8. Serial Programming Instruction example
154
Instruction/Operation
Write Fuse bits
Write Fuse High bits
Write Extended Fuse Bits
Byte 1
ATtiny43U
Load Program Memory Page (High/Low Byte)/
Load EEPROM Memory Page (page access)
Bit 15 B
Byte 2
Adr MSB
Adr dr M
A
(1)
r MS S B
Notes:
If the LSB in RDY/BSY data byte out is ‘1’, a programming operation is still pending. Wait until
this bit returns ‘0’ before the next instruction is carried out.
Within the same page, the low data byte must be loaded prior to the high data byte.
After data is loaded to the page buffer, program the EEPROM page, see
154.
Byte 3
Adr LSB
1. Not all instructions are applicable for all parts.
2. a = address
3. Bits are programmed ‘0’, unprogrammed ‘1’.
4. To ensure future compatibility, unused Fuses and Lock bits should be unprogrammed (‘1’) .
5. Refer to the correspondig section for Fuse and Lock bits, Calibration and Signature bytes and
6. See htt://www.atmel.com/avr for Application Notes regarding programming and programmers.
Page size.
Page Offset
0
Serial Programming Instruction
Byte 4
Byte 1
$AC
$AC
$AC
Program Memory/
EEPROM Memory
Page Buffer
Page N-1
Page 0
Page 1
Page 2
Byte 1
Byte 2
$A0
$A8
$A4
Instruction Format
Page Number
Bit 15 B
Write Program Memory Page/
Write EEPROM Memory Page
Byte 2
Adr MSB
Byte 3
$00
$00
$00
Byte 3
Adr LSB
A A dr dr LS
LSB
SB
Figure 19-8 on page
0
data byte in
data byte in
data byte in
8048B–AVR–03/09
Byte4
Byte 4
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