PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 214

IC PIC MCU FLASH 4KX14 16QFN

PIC16F688-E/ML

Manufacturer Part Number
PIC16F688-E/ML
Description
IC PIC MCU FLASH 4KX14 16QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F688-E/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Controller Family/series
PIC16F
No. Of I/o's
12
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, RS- 232, SCI, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
 Details
PICmicro MID-RANGE MCU FAMILY
14.6
DS31014A-page 14-12
Initialization
The CCP module has three modes of operation.
mode,
tialization of PWM mode.
Example 14-3:
;
; The CCP1 interrupt is disabled,
; do polling on the CCP Interrupt flag bit
;
Capture_Event
;
; Capture has occurred
;
CLRF
CLRF
CLRF
CLRF
BSF
BSF
CLRF
BCF
CLRF
MOVLW
MOVWF
BSF
BTFSS
GOTO
BCF
Example 14-4
CCP1CON
TMR1H
TMR1L
INTCON
STATUS, RP0
TRISC, CCP1
PIE1
STATUS, RP0
PIR1
0x06
CCP1CON
T1CON, TMR1ON ; Timer1 starts to increment
PIR1, CCP1IF
Capture_Event
PIR1, CCP1IF
Capture Initialization
shows the initialization of compare mode, and
; CCP Module is off
; Clear Timer1 High byte
; Clear Timer1 Low byte
; Disable interrupts and clear T0IF
; Bank1
; Make CCP pin input
; Disable peripheral interrupts
; Bank0
; Clear peripheral interrupts Flags
; Capture mode, every 4th rising edge
;
; This needs to be done before next compare
Example 14-3
shows the initialization of capture
1997 Microchip Technology Inc.
Example 14-5
shows the ini-

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