ATTINY20-SSU Atmel, ATTINY20-SSU Datasheet - Page 153

• Manufacturer Part Number: ATTINY20-SSU
• Description: MCU AVR 2KB FLASH 12MHZ 14SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY20-SSU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: ATtiny
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI, TWI
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.3.1
18.3.2
18.3.3
8235B–AVR–04/11
Enabling
Disabling
Frame Format
The TPI is accessed via three pins, as follows:
In addition, the V
device.
The following sequence enables the Tiny Programming Interface:
See
Figure 18-2. Sequence for enabling the Tiny Programming Interface
Provided that the NVM enable bit has been cleared, the TPI is automatically disabled if the
RESET pin is released to inactive high state or, alternatively, if V
RESET pin.
If the NVM enable bit is not cleared a power down is required to exit TPI programming mode.
See NVMEN bit in
The TPI physical layer supports a fixed frame format. A frame consists of one character, eight
bits in length, and one start bit, a parity bit and two stop bits. Data is transferred with the least
significant bit first.
RESET
TPICLK
TPIDATA
• Apply 5V between V
• Depending on the method of reset to be used:
• Wait t
• Keep the TPIDATA pin high for 16 TPICLK cycles
Figure 18-2
– Either: wait t
– Or: if the RSTDISBL configuration bit has been programmed, apply 12V to the
RESET:
TPICLK:
TPIDATA:
This will reset the device and enable the TPI physical layer. The RESET pin must
then be kept low for the entire programming session
RESET pin. The RESET pin must be kept at 12V for the entire programming session
RST
(see
CC
for guidance.
Table 20-4 on page
“TPISR – Tiny Programming Interface Status Register” on page
and GND pins must be connected between the external programmer and the
TOUT
Tiny Programming Interface enable input
Tiny Programming Interface clock input
Tiny Programming Interface data input/output
t
CC
RST
(see
and GND
Table 20-4 on page
175)
175) and then set the RESET pin low.
16 x TPICLK CYCLES
HV
is no longer applied to the
ATtiny20
162.
153