ATTINY9-TS8R Atmel, ATTINY9-TS8R Datasheet - Page 82
ATTINY9-TS8R
Manufacturer Part Number
ATTINY9-TS8R
Description
IC MCU AVR 1KB FLASH SOT-23-6
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY9-MAHR.pdf
(169 pages)
Specifications of ATTINY9-TS8R
Package / Case
SOT-23-6
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
1KB (1K x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Processor Series
ATTINY9x
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY9-TS8R
Manufacturer:
Atmel
Quantity:
482
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12. Analog Comparator
12.1
12.1.1
82
Register Description
ATtiny4/5/9/10
ACSR – Analog Comparator Control and Status Register
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator can trigger a separate inter-
rupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on comparator
output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is shown
in
Figure 12-1. Analog Comparator Block Diagram.
See
Table 10-5 on page 51
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the analog comparator is switched off. This bit
can be set at any time to turn off the analog comparator, thus reducing power consumption in
Active and Idle mode. When changing the ACD bit, the analog comparator Interrupt must be dis-
abled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bits 6 – Res: Reserved Bit
This bit is reserved and will always read zero.
• Bit 5 – ACO: Analog Comparator Output
Enables output of analog comparator. The output of the analog comparator is synchronized and
then directly connected to ACO. The synchronization introduces a delay of 1 - 2 clock cycles.
Bit
0x1F
Read/Write
Initial Value
Figure
Figure 1-1 on page 2
12-1.
ACD
R/W
7
0
for alternate pin usage.
R
6
–
0
for pin use of analog comparator, and
ACO
R
5
0
R/W
ACI
4
0
ACIE
R/W
3
0
ACIC
R/W
2
0
ACIS1
R/W
1
0
Table 10-4 on page 50
ACIS0
R/W
0
0
ACSR
8127D–AVR–02/10
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