ATTINY9-TS8R Atmel, ATTINY9-TS8R Datasheet - Page 103
ATTINY9-TS8R
Manufacturer Part Number
ATTINY9-TS8R
Description
IC MCU AVR 1KB FLASH SOT-23-6
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY9-MAHR.pdf
(169 pages)
Specifications of ATTINY9-TS8R
Package / Case
SOT-23-6
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
1KB (1K x 8)
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Processor Series
ATTINY9x
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY9-TS8R
Manufacturer:
Atmel
Quantity:
482
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14.5
14.5.1
8127D–AVR–02/10
Instruction Set
SLD - Serial LoaD from data space using indirect addressing
The TPI has a compact instruction set that is used to access the TPI Control and Status Space
(CSS) and the data space. The instructions allow the external programmer to access the TPI,
the NVM Controller and the NVM memories. All instructions except SKEY require one byte oper-
and following the instruction. The SKEY instruction is followed by 8 data bytes. All instructions
are byte-sized.
The TPI instruction set is summarised in
Table 14-1.
The SLD instruction uses indirect addressing to load data from the data space to the TPI physi-
cal layer shift-register for serial read-out. The data space location is pointed by the Pointer
Register (PR), where the address must have been stored before data is accessed. The Pointer
Register is either left unchanged by the operation, or post-incremented, as shown in
Table 14-2.
Mnemonic
SLD
SLD
SST
SST
SSTPR
SIN
SOUT
SLDCS
SSTCS
SKEY
Operation
data
data
←
←
DS[PR]
DS[PR]
Instruction Set Summary
The Serial Load from Data Space (SLD) Instruction
Operand
data, PR
data, PR+
PR, data
PR+, data
PR, a
data, a
a, data
data, a
a, data
Key, {8{data}}
Opcode
0010 0000
0010 0100
Description
Serial LoaD from data space using indirect
addressing
Serial LoaD from data space using indirect
addressing and post-increment
Serial STore to data space using indirect
addressing
Serial STore to data space using indirect
addressing and post-increment
Serial STore to Pointer Register using direct
addressing
Serial IN from data space
Serial OUT to data space
Serial LoaD from Control and Status space
using direct addressing
Serial STore to Control and Status space
using direct addressing
Serial KEY
Table
14-1.
Remarks
PR
PR
←
←
PR
PR + 1
ATtiny4/5/9/10
Register
Unchanged
Post increment
data
Key
Operation
data
data
PR
DS[PR]
DS[PR]
PR
PR[a]
I/O[a]
data
CSS[a]
←
←
←
←
←
←
←
←
←
PR+1
PR+1
←
{8{data}}
←
←
DS[PR]
DS[PR]
I/O[a]
CSS[a]
Table
data
data
data
data
data
14-2.
103
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