ATTINY5-TS8R Atmel, ATTINY5-TS8R Datasheet - Page 99
ATTINY5-TS8R
Manufacturer Part Number
ATTINY5-TS8R
Description
IC MCU AVR 512B FLASH SOT-23-6
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY9-MAHR.pdf
(169 pages)
Specifications of ATTINY5-TS8R
Package / Case
SOT-23-6
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
12MHz
Number Of I /o
4
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32 x 8
Program Memory Size
512B (512 x 8)
Data Converters
A/D 4x8b
Oscillator Type
Internal
Peripherals
POR, PWM, WDT
Core Size
8-Bit
Processor Series
ATTINY5x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY5-TS8R
Manufacturer:
Atmel
Quantity:
8 105
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14.3.2
14.3.3
14.3.4
14.3.5
8127D–AVR–02/10
Disabling
Frame Format
Parity Bit Calculation
Supported Characters
Provided that the NVM enable bit has been cleared, the TPI is automatically disabled if the
RESET pin is released to inactive high state or, alternatively, if V
RESET pin.
If the NVM enable bit is not cleared a power down is required to exit TPI programming mode.
See NVMEN bit in
The TPI physical layer supports a fixed frame format. A frame consists of one character, eight
bits in length, and one start bit, a parity bit and two stop bits. Data is transferred with the least
significant bit first.
Figure 14-4. Serial frame format.
Symbols used in
The parity bit is always calculated using even parity. The value of the bit is calculated by doing
an exclusive-or of all the data bits, as follows:
where:
The BREAK character is equal to a 12 bit long low level. It can be extended beyond a bit-length
of 12.
Figure 14-5. Supported characters.
TPIDATA
TPIDATA
TPICLK
TPIDATA
ST:
D0-D7: Data bits (least significant bit sent first)
P:
SP1:
SP2:
P = D0
P:
D0-D7:
IDLE
IDLE
⊗
IDLE
Start bit (always low)
Parity bit (using even parity)
Stop bit 1 (always high)
Stop bit 2 (always high)
D1
Figure
“TPISR – Tiny Programming Interface Status Register” on page
⊗
ST
ST
Parity bit using even parity
Data bits of the character
D2
14-4:
⊗
D3
D0
D0
⊗
D4
D1
D1
⊗
D5
DATA CHARACTER
BREAK CHARACTER
⊗
D6
⊗
D7
D7
⊗
D7
0
P
P
HV
ATtiny4/5/9/10
is no longer applied to the
SP1
SP1
SP2
SP2
107.
IDLE/ST
IDLE/ST
IDLE/ST
99
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