ATTINY10-MAHR Atmel, ATTINY10-MAHR Datasheet

no-image

ATTINY10-MAHR

Manufacturer Part Number
ATTINY10-MAHR
Description
MCU AVR 1024K FLASH 12MHZ 8UDFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY10-MAHR

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Peripherals
POR, PWM, WDT
Number Of I /o
4
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Ram Size
32 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
ATTINY10-MAH
ATTINY10-MAH
Features
Note:
High Performance, Low Power AVR
Advanced RISC Architecture
Non-volatile Program and Data Memories
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Programming Voltage:
Speed Grade
Industrial Temperature Range
Low Power Consumption
– 54 Powerful Instructions – Most Single Clock Cycle Execution
– 16 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 12 MIPS Throughput at 12 MHz
– 512/1024 Bytes of In-System Programmable Flash Program Memory
– 32 Bytes Internal SRAM
– Flash Write/Erase Cycles: 10,000
– Data Retention: 20 Years at 85
– One 16-bit Timer/Counter with Prescaler and Two PWM Channels
– Programmable Watchdog Timer with Separate On-chip Oscillator
– 4-channel, 8-bit Analog to Digital Converter
– On-chip Analog Comparator
– In-System Programmable
– External and Internal Interrupt Sources
– Low Power Idle, ADC Noise Reduction, and Power-down Modes
– Enhanced Power-on Reset Circuit
– Programmable Supply Voltage Level Monitor with Interrupt and Reset
– Internal Calibrated Oscillator
– Four Programmable I/O Lines
– 6-pin SOT and 8-pad UDFN
– 1.8 – 5.5V
– 5V
– 0 – 4 MHz @ 1.8 – 5.5V
– 0 – 8 MHz @ 2.7 – 5.5V
– 0 – 12 MHz @ 4.5 – 5.5V
– Active Mode:
– Idle Mode:
– Power-down Mode:
• 200µA at 1MHz and 1.8V
• 25µA at 1MHz and 1.8V
• < 0.1µA at 1.8V
1. The Analog to Digital Converter (ADC) is available in ATtiny5/10, only
2. At 5V, only
(2)
o
®
C / 100 Years at 25
8-Bit Microcontroller
(1)
o
C
8-bit
Microcontroller
with 512/1024
Bytes In-System
Programmable
Flash
ATtiny4/5/9/10
Preliminary
Summary
Rev. 8127DS–AVR–02/10

Related parts for ATTINY10-MAHR

ATTINY10-MAHR Summary of contents

Page 1

Features • High Performance, Low Power AVR • Advanced RISC Architecture – 54 Powerful Instructions – Most Single Clock Cycle Execution – General Purpose Working Registers – Fully Static Operation – MIPS Throughput at ...

Page 2

Pin Configurations Figure 1-1. (PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1 (PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1 1.1 Pin Description 1.1.1 VCC Supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB3..PB0) This is a 4-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each bit. The ...

Page 3

Overview ATtiny4/5/9/10 are low-power CMOS 8-bit microcontrollers based on the compact AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny4/5/9/10 achieve throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize ...

Page 4

... Flash allows program memory to be re-programmed in-system by a conventional, non-volatile memory programmer. The ATtiny4/5/9/10 AVR are supported by a suite of program and system development tools, including macro assemblers and evaluation kits. 2.1 Comparison of ATtiny4, ATtiny5, ATtiny9 and ATtiny10 A comparison of the devices is shown in Table 2-1. ATtiny4/5/9/10 4 ...

Page 5

... General Information 3.1 Resources A comprehensive set of drivers, application notes, data sheets and descriptions on development tools are available for download at http://www.atmel.com/avr. 3.2 Code Examples This documentation contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation ...

Page 6

Register Summary Address Name Bit 7 0x3F SREG I 0x3E SPH 0x3D SPL 0x3C CCP 0x3B RSTFLR – 0x3A SMCR – 0x39 OSCCAL 0x38 Reserved – 0x37 CLKMSR – 0x36 CLKPSR – 0x35 PRR – 0x34 VLMCSR VLMF 0x33 ...

Page 7

Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI ...

Page 8

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add without Carry ADC Rd, Rr Add with Carry SUB Rd, Rr Subtract without Carry SUBI Rd, K Subtract Immediate SBC Rd, Rr Subtract with Carry SBCI ...

Page 9

Mnemonics Operands BCLR s Flag Clear SBI A, b Set Bit in I/O Register CBI A, b Clear Bit in I/O Register BST Rr, b Bit Store from Register to T BLD Rd, b Bit load from T to Register ...

Page 10

... Line: xx – 3rd Line: xxx 5. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 6. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10 Specification at 125°C. ...

Page 11

... Line: xx – 3rd Line: xxx 5. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 6. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10 Specification at 125°C. ...

Page 12

... Line: xx – 3rd Line: xxx 5. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 6. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10 Specification at 125°C. ...

Page 13

... For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10 Specification at 125°C. 6ST1 6-lead, 2.90 x 1.60 mm Plastic Small Outline Package (SOT23) 8MA4 8-pad 0.6 mm Plastic Ultra Thin Dual Flat No Lead (UDFN) 8127DS–AVR–02/10 (1) Ordering Code (3) ATtiny10-TSHR (4) ATtiny10-MAHR (3) ATtiny10-TS8R Package Type ATtiny4/5/9/10 (2) Package Operational Range 6ST1 Industrial (5) (-40° ...

Page 14

... Mold Flash, protrustion or gate burrs shall not exceed 0.25 mm per end. 3. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum b dimension by more than 0. Die is facing down after trim/form. Package Drawing Contact: packagedrawings@atmel.com ATtiny4/5/9/ ...

Page 15

... E2 C0.2 4 BOTTOM VIEW Note: 1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES. 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS COPLANARITY SHALL NOT EXCEED 0.05 mm. 3. WARPAGE SHALL NOT EXCEED 0.05 mm. 4. REFER JEDEC MO-236/MO-252 Package Drawing Contact: packagedrawings@atmel.com 8127DS–AVR–02/ TITLE 8PAD, 2x2x0 ...

Page 16

Errata The revision letters in this section refer to the revision of the corresponding ATtiny4/5/9/10 device. 8.1 ATtiny4 8.1.1 Rev. E • Programming Lock Bits 1. Programming Lock Bits Programming Lock Bits to a lock mode equal or lower ...

Page 17

Rev. D • ESD HBM (ESD STM 5.1) level ±1000V • Programming Lock Bits 1. ESD HBM (ESD STM 5.1) level ±1000V The device meets ESD HBM (ESD STM 5.1) level ±1000V. Problem Fix / Workaround Always use proper ...

Page 18

... Rev. A – C Not sampled. 8.4 ATtiny10 8.4.1 Rev. E • Programming Lock Bits 1. Programming Lock Bits Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be corrupted. The location of the corruption is random. Problem Fix / Workaround When programming Lock Bits, make sure lock mode is not set to present, or lower levels ...

Page 19

... Also, updated some other plots in Typical Characteristics. 10 page 13 Section 8. “Errata” on page 16 “Comparison of ATtiny4, ATtiny5, ATtiny9 and ATtiny10” on page 4 “ADC Clock – clkADC” on page 18 “Starting from Idle / ADC Noise Reduction / Standby Mode” on page 20 “ADC Noise Reduction Mode” on page 24 “ ...

Page 20

Added figure: – 6. Updated figure: – 7. Added table: – 8. Updated tables: – – – – 9.4 Rev. 8127A – 04/09 1. Initial revision ATtiny4/5/9/10 20 “Register Summary” on page 6 “Ordering Information” on page ...

Page 21

ATtiny4/5/9/10 21 ...

Page 22

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords