M30833FJFP#U5 Renesas Electronics America, M30833FJFP#U5 Datasheet - Page 24

• Manufacturer Part Number: M30833FJFP#U5
• Description: IC M32C/83 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJFP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
4. Special Function Registers (SFR)
e
E
3
. v
J
2
Address
X: Indeterminate
Blank spaces are reserved. No access is allowed.
NOTES:
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
000A
000B
000C
000D
000E
000F
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
001A
001B
001C
001D
001E
001F
0020
0021
0022
0023
0024
0025
0026
0027
0028
0029
002A
002B
002C
002D
002E
002F
0
C
1
3
1. The PM00 and PM01 bits in the PM1 register maintain values set before reset even if software reset or watchdog timer reset is performed.
2. These registers in M32C/83T cannot be used.
4 .
B
8 /
0
1
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
3
0
1
J
G
3
a
Processor Mode Register 0
Processor Mode Register 1
System Clock Control Register 0
System Clock Control Register 1
Wait Control Register
Address Match Interrupt Enable Register
Protect Register
External Data Bus Width Control Register
Main Clock Division Register
Oscillation Stop Detection Register
Watchdog Timer Start Register
Watchdog Timer Control Register
Address Match Interrupt Register 0
Address Match Interrupt Register 1
VDC Control Register for PLL
Address Match Interrupt Register 2
VDC Control Register 0
Address Match Interrupt Register 3
o r
0 -
n
3 .
1
u
, 1
4
p
1
(
2
M
0
0
3
6
2
C
8 /
Page 22
, 3
M
(2)
3
2
C
Register
f o
(1)
8 /
9
3
1
) T
(2)
PM0
PM1
CM0
CM1
WCR
AIER
PRCR
DS
MCD
CM2
WDTS
WDC
RMAD0
RMAD1
PLV
RMAD2
VDC0
RMAD3
Symbol
1000 0000
0000 0011
XXXX 1000
XXXX 0000
Value after RESET
0X00 0000
0000 X000
0010 0000
1111 1111
XXXX 0000
XXXX 0000
XXX0 1000
00
XX
000X XXXX
00 00 00
00 00 00
XXXX XX01
00 00 00
00
00 00 00
16
16
16
2
2
2
2
(CNVss pin ="L")
(CNVss pin ="H")
(BYTE pin ="L")
(BYTE pin ="H")
16
16
16
16
2
2
2
2
2
2
2
2
2