M30879FLFP#U3 Renesas Electronics America, M30879FLFP#U3 Datasheet - Page 130

IC M32C/87 MCU FLASH 100QFP

M30879FLFP#U3

Manufacturer Part Number
M30879FLFP#U3
Description
IC M32C/87 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30879FLFP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30879FLFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30879FLFP#U3M30879FLFP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R
R
e
E
v
NEG
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable dest ]
[ Flag Change ]
[ Description Example ]
J
Chapter 3 Functions
*1 Indirect instruction addressing [dest] can be used in all addressing except R0L/R0/R2R0, R0H/R2/-,
1 .
Change
0
Conditions
9
Flag
NEG.size
dest
0 .
B
• This instruction takes the 2's complement of
• When (.W) is specified for the size specifier (.size) and
R1L/R1/R3R1, and R1H/R3/-.
O :
S :
Z :
C :
NEG.B
NEG.W
NEG.W
0
0
high-order bits become 0.
3
1
2
9
0
0 -
U
0
The flag is set when
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
The flag is set when the operation resulted in 0; otherwise cleared.
The flag is set when the operation resulted in 0; otherwise cleared.
6
1
0 .
0
0
0
5
I
3 .
1
dest
R0L
A1
[[A0]]
-
O
p
dest
a
g
e
B
112
S
f o
dest
Z
3
3
5
before the operation is - 128 (.B) or - 32768 (.W); otherwise cleared.
D
C
[dest]
Two’s complement
B , W
NEGate
dest
0
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
and stores the result in
-
[dest]
dest
is the address register(A0, A1), the 8
[ Instruction Code/Number of Cycles ]
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
dest*
dest
R0H/R2/-
R1H/R3/-
[A0]
dsp:16[SB]
dsp:8[SB]
abs24
1
.
3.2 Functions
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
NEG
Page=
263

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