M30620FCPGP#U5C Renesas Electronics America, M30620FCPGP#U5C Datasheet - Page 60
M30620FCPGP#U5C
Manufacturer Part Number
M30620FCPGP#U5C
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30620FCPGP#U5C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
5.3
5.4
5.5
The microcomputer resets pins, the CPU and SFR when the PM03 bit in the PM0 register is set to “1”
(microcomputer reset). Then the microcomputer executes the program in an address determined by the reset vector.
Set the PM03 bit to “1” while the main clock is selected as the CPU clock and the main clock oscillation is stable.
In the software reset, the microcomputer does not reset a part of the SFR. Refer to 4. Special Function Register
(SFR) for details.
Processor mode remains unchanged since the PM01 to PM00 bits in the PM0 register are not reset.
The microcomputer resets pins, the CPU and SFR when the CM06 bit in the CM0 register is set to “1” (reset) and
the watchdog timer underflows. Then the microcomputer executes the program in an address determined by the
reset vector.
In the watchdog timer reset, the microcomputer does not reset a part of the SFR. Refer to 4. Special Function
Register (SFR) for details. Processor mode remains unchanged since the PM01 to PM00 bits in the PM0 register
are not reset.
The microcomputer resets and stops pins, the CPU and SFR when the CM27 bit in the CM2 register is 0, if it
detects main clock oscillation circuit stop. Refer to 10.6 Oscillation Stop and Re-oscillation Detect Function for
details.
In the oscillation stop detection reset, the microcomputer does not reset a part of the SFR. Refer to 4. Special
Function Register (SFR) for details. Processor mode remains unchanged since the PM01 to PM00 bits in the
PM0 register are not reset.
Software Reset
Oscillation Stop Detection Reset
Jan 10, 2006
Watchdog Timer Reset
Page 43 of 390
5. Reset
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