M30622F8PGP#U7C Renesas Electronics America, M30622F8PGP#U7C Datasheet - Page 52
![IC M16C MCU FLASH 64K 100LQFP](/photos/12/29/122905/m30622f8pgp_u7c_sml.jpg)
M30622F8PGP#U7C
Manufacturer Part Number
M30622F8PGP#U7C
Description
IC M16C MCU FLASH 64K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30622F8PGP#U7C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30622F8PGP#U7CM30622F8PGP#D3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30622F8PGP#U7CM30622F8PGP#D5C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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3.1 Guide to This Chapter
Chapter 3 Functions
This chapter describes the functionality of each instruction by showing syntax, operation, function, select-
able src/dest, flag changes, description examples, and related instructions.
The following shows how to read this chapter by using an actual page as an example.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Chapter 3 Functions
[ Reated Instruction]
Change
Conditions
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:20[A0]
R2R0
Flag
MOV
[ Flag Change ]
[ Selectable src/dest ]
[ Syntax ]
[ Operation ]
[ Function ]
[ Description Example ]
MOV.size (:format) src,dest
dest
S :
Z :
•
•
MOV.B:S
MOV.W
U
This instruction transfers src to dest .
If dest is an address register when the size specifier (.size) you selected is (.B), src is zero-expanded to transfer data in
16 bits. If src is an address register, data is transferred from the address register’s 8 low-order bits.
The flag is set when the transfer resulted in MSB of dest = 1; otherwise cleared.
The flag is set when the transfer resulted in 0; otherwise cleared.
I
R3R1
R0H/R1
A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:20[A1]
src
O
#0ABH,R0L
#-1,R2
B
src
LDE,STE,XCHG
A1A0
S
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
Z
D
dsp:8[SP]
C
R1H/R3
[A1]
dsp:8[FB]
abs16
#IMM
92
Transfer
34
MOVe
G , Q , Z , S (Can be specified)
B , W
(See the next page for src/dest classified by format.)
R2R0
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:20[A0]
[ Instruction Code/Number of Cycles ]
R0H/R1
A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:20[A1]
R3R1
3.1 Guide to This Chapter
dest
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
3.2 Functions
MOV
Page=195
dsp:8[SP]
R1H/R3
[A1]
dsp:8[FB]
abs16
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