C8051F349-GM Silicon Laboratories Inc, C8051F349-GM Datasheet - Page 8
C8051F349-GM
Manufacturer Part Number
C8051F349-GM
Description
IC 8051 MCU 32K FLASH MEM 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F34xr
Datasheet
1.C8051F349-GQ.pdf
(276 pages)
Specifications of C8051F349-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F340DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1748 - ADAPTER TOOLSTICK FOR C8051F34X
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1349-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F349-GM
Manufacturer:
Silicon Labs
Quantity:
135
- Current page: 8 of 276
- Download datasheet (2Mb)
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
List of Figures
1. System Overview
4. Pinout and Package Definitions
5. 10-Bit ADC (ADC0, C8051F340/1/2/3/4/5/6/7/A/B Only)
6. Voltage Reference (C8051F340/1/2/3/4/5/6/7/A/B Only)
7. Comparators
8. Voltage Regulator (REG0)
9. CIP-51 Microcontroller
11. Reset Sources
8
Figure 1.1. C8051F340/1/4/5 Block Diagram ........................................................... 19
Figure 1.2. C8051F342/3/6/7 Block Diagram ........................................................... 20
Figure 1.3. C8051F348/C Block Diagram................................................................. 21
Figure 1.4. C8051F349/D Block Diagram................................................................. 22
Figure 1.5. C8051F34A/B Block Diagram ................................................................ 23
Figure 4.1. TQFP-48 Pinout Diagram (Top View) .................................................... 31
Figure 4.2. TQFP-48 Package Diagram ................................................................... 32
Figure 4.3. TQFP-48 Recommended PCB Land Pattern ......................................... 33
Figure 4.4. LQFP-32 Pinout Diagram (Top View)..................................................... 34
Figure 4.5. LQFP-32 Package Diagram ................................................................... 35
Figure 4.6. LQFP-32 Recommended PCB Land Pattern ......................................... 36
Figure 4.7. QFN-32 Pinout Diagram (Top View) ...................................................... 37
Figure 5.1. ADC0 Functional Block Diagram............................................................ 41
Figure 5.2. Temperature Sensor Transfer Function ................................................. 43
Figure 5.3. Temperature Sensor Error with 1-Point Calibration (VREF = 2.40 V) .... 44
Figure 5.4. 10-Bit ADC Track and Conversion Example Timing .............................. 46
Figure 5.5. ADC0 Equivalent Input Circuits .............................................................. 47
Figure 5.6. ADC Window Compare Example: Right-Justified Single-Ended Data ... 54
Figure 5.7. ADC Window Compare Example: Left-Justified Single-Ended Data...... 54
Figure 5.8. ADC Window Compare Example: Right-Justified Differential Data........ 55
Figure 5.9. ADC Window Compare Example: Left-Justified Differential Data .......... 55
Figure 6.1. Voltage Reference Functional Block Diagram........................................ 57
Figure 7.1. Comparator Functional Block Diagram .................................................. 60
Figure 7.2. Comparator Hysteresis Plot ................................................................... 61
Figure 8.1. REG0 Configuration: USB Bus-Powered ............................................... 70
Figure 8.2. REG0 Configuration: USB Self-Powered ............................................... 70
Figure 8.3. REG0 Configuration: USB Self-Powered, Regulator Disabled............... 71
Figure 8.4. REG0 Configuration: No USB Connection ............................................. 71
Figure 9.1. CIP-51 Block Diagram............................................................................ 73
Figure 9.2. On-Chip Memory Map for 64 kB Devices............................................... 79
Figure 9.3. On-Chip Memory Map for 32 kB Devices............................................... 80
Figure 11.1. Reset Sources.................................................................................... 100
Figure 11.2. Power-On and VDD Monitor Reset Timing ........................................ 101
Rev. 1.3
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