C8051F546-IM Silicon Laboratories Inc, C8051F546-IM Datasheet - Page 11

• Manufacturer Part Number: C8051F546-IM
• Description: IC 8051 MCU 8K FLASH 24-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F54xr

Specifications of C8051F546-IM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), LIN, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 18
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 18x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 18
• Operating Supply Voltage: 1.8 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F540DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1672 - BOARD PROTOTYPE W/C8051F540336-1669 - KIT DEVELOPMENT FOR C8051F540
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1681-5

C8051F54x
SFR Definition 16.1. VDM0CN: VDD Monitor Control ................................................ 132
SFR Definition 16.2. RSTSRC: Reset Source ............................................................ 134
SFR Definition 17.1. CLKSEL: Clock Select ............................................................... 136
SFR Definition 17.2. OSCICN: Internal Oscillator Control .......................................... 138
SFR Definition 17.3. OSCICRS: Internal Oscillator Coarse Calibration ...................... 139
SFR Definition 17.4. OSCIFIN: Internal Oscillator Fine Calibration ............................ 139
SFR Definition 17.5. CLKMUL: Clock Multiplier .......................................................... 141
SFR Definition 17.6. OSCXCN: External Oscillator Control ........................................ 143
SFR Definition 18.1. XBR0: Port I/O Crossbar Register 0 .......................................... 154
SFR Definition 18.2. XBR1: Port I/O Crossbar Register 1 .......................................... 155
SFR Definition 18.3. XBR2: Port I/O Crossbar Register 1 .......................................... 156
SFR Definition 18.4. P0MASK: Port 0 Mask Register ................................................. 157
SFR Definition 18.5. P0MAT: Port 0 Match Register .................................................. 157
SFR Definition 18.6. P1MASK: Port 1 Mask Register ................................................. 158
SFR Definition 18.7. P1MAT: Port 1 Match Register .................................................. 158
SFR Definition 18.8. P2MASK: Port 2 Mask Register ................................................. 159
SFR Definition 18.9. P2MAT: Port 2 Match Register .................................................. 159
SFR Definition 18.10. P3MASK: Port 3 Mask Register ............................................... 160
SFR Definition 18.11. P3MAT: Port 3 Match Register ................................................ 160
SFR Definition 18.12. P0: Port 0 ................................................................................. 161
SFR Definition 18.13. P0MDIN: Port 0 Input Mode ..................................................... 162
SFR Definition 18.14. P0MDOUT: Port 0 Output Mode .............................................. 162
SFR Definition 18.15. P0SKIP: Port 0 Skip ................................................................. 163
SFR Definition 18.16. P1: Port 1 ................................................................................. 163
SFR Definition 18.17. P1MDIN: Port 1 Input Mode ..................................................... 164
SFR Definition 18.18. P1MDOUT: Port 1 Output Mode .............................................. 164
SFR Definition 18.19. P1SKIP: Port 1 Skip ................................................................. 165
SFR Definition 18.20. P2: Port 2 ................................................................................. 165
SFR Definition 18.21. P2MDIN: Port 2 Input Mode ..................................................... 166
SFR Definition 18.22. P2MDOUT: Port 2 Output Mode .............................................. 166
SFR Definition 18.23. P2SKIP: Port 2 Skip ................................................................. 167
SFR Definition 18.24. P3: Port 3 ................................................................................. 167
SFR Definition 18.25. P3MDIN: Port 3 Input Mode ..................................................... 168
SFR Definition 18.26. P3MDOUT: Port 3 Output Mode .............................................. 168
SFR Definition 18.27. P3SKIP: Port 3Skip .................................................................. 169
SFR Definition 19.1. LIN0ADR: LIN0 Indirect Address Register ................................. 177
SFR Definition 19.2. LIN0DAT: LIN0 Indirect Data Register ....................................... 177
SFR Definition 19.3. LIN0CF: LIN0 Control Mode Register ........................................ 178
SFR Definition 20.1. SMB0CF: SMBus Clock/Configuration ...................................... 193
SFR Definition 20.2. SMB0CN: SMBus Control .......................................................... 195
SFR Definition 20.3. SMB0DAT: SMBus Data ............................................................ 197
SFR Definition 21.1. SCON0: Serial Port 0 Control .................................................... 210
SFR Definition 21.2. SMOD0: Serial Port 0 Control .................................................... 211
SFR Definition 21.3. SBUF0: Serial (UART0) Port Data Buffer .................................. 212
SFR Definition 21.4. SBCON0: UART0 Baud Rate Generator Control ...................... 212
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