C8051T602-GM Silicon Laboratories Inc, C8051T602-GM Datasheet - Page 167
![IC 8051 MCU 4K-EEPROM 11-QFN](/photos/12/25/122559/c8051t602-gm_sml.jpg)
C8051T602-GM
Manufacturer Part Number
C8051T602-GM
Description
IC 8051 MCU 4K-EEPROM 11-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Datasheet
1.C8051T600EDB.pdf
(188 pages)
Specifications of C8051T602-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
11-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T600DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
336-1404 - KIT DEV FOR C8051T60X MCU'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
336-1654-5
- Current page: 167 of 188
- Download datasheet (898Kb)
26.3.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The Capture/Compare module high byte holds the number of PCA clocks to count before the
output is toggled. The frequency of the square wave is then defined by Equation 26.1.
Where F
PCA0MD. The lower byte of the capture/compare module is compared to the PCA counter low byte; on a
match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.
Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-
ister. Note that the MATn bit should normally be set to 0 in this mode. If the MATn bit is set to 1, the CCFn
flag for the channel will be set when the 16-bit PCA0 counter and the 16-bit capture/compare register for
the channel are equal.
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
PCA0CPLn
Write to
Reset
PCA0CPHn
PCA
Write to
is the frequency of the clock selected by the CPS2–0 bits in the PCA mode register,
0
ENB
ENB
1
Equation 26.1. Square Wave Frequency Output
W
M
P
1
6
n
Figure 26.7. PCA Frequency Output Mode
x
C
O
M
E
n
PCA0CPMn
C
A
P
P
n
0 0 0
C
N
A
P
n
M
A
T
n
O
G
T
n
P
W
M
n
E
C
C
F
n
x
PCA Timebase
F
CEXn
Enable
=
Comparator
PCA0CPLn
Rev. 1.2
---------------------------------------- -
2
PCA0L
8-bit
PCA0CPHn
F
PCA
C8051T600/1/2/3/4/5/6
match
Enable
Adder
8-bit Adder
Toggle
TOGn
0
1
CEXn
PCA0CPHn
Crossbar
Port I/O
167
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