Z86E4412PSG Zilog, Z86E4412PSG Datasheet - Page 18

• Manufacturer Part Number: Z86E4412PSG
• Description: IC MICROCONTROLLER 16K 40-DIP
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E4412PSG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: EBI/EMI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 236 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.620", 15.75mm)
• Processor Series: Z86E4xx
• Core: Z8
• Data Bus Width: 8 bit
• Data Ram Size: 237 B
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 3.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: Z86E4400ZDV, Z86E4400ZDP, Z86E4400ZDF, Z86E3400ZDV, Z86E3400ZDS, Z86E3400ZDP, Z86C4001ZDV
• Minimum Operating Temperature: 0 C
• For Use With: 309-1034 - ADAPTER 40-DIP ZIF TO 44-QFP309-1033 - ADAPTER 40-DIP TO 44-QFP309-1030 - ADAPTER 40-DIP TO 44-PLCC309-1029 - ADAPTER 40-DIP ZIF TO 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3980; Z86E4412PSG

DC ELECTRICAL CHARACTERISTICS (Continued)
Z86E33/733/E34/E43/743/E44
CMOS Z8 OTP Microcontrollers
Notes:
Standard Test Load
All timing references use 0.7 V
For Standard Mode (not Low-EMI Mode for outputs) with SMR D1 = 0, D0 = 0.
18
1. When using extended memory timing, add 2 TpC.
2. Timing numbers given are for minimum TpC.
3. The V
No
10
11
12
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
the V
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
TdAS(DS)
TwDSR
TwDSW
TdDSR(DR)
ThDR(DS)
TdDS(A)
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
TdDS(DW)
TdA(DR)
TdAS(DS)
TdDM(AS)
ThDS(AS)
CC
CC
voltage specification of 3.5V guarantees only 3.5V
Symbol
voltage specification of 5.5V guarantees 5.0V ±0.5V and
Address Valid to /AS Rise
Delay
/AS Rise to Address Float
Delay
/AS Rise to Read Data
Req’d Valid
/AS Low Width
Address Float to /DS Fall
/DS (Read) Low Width
/DS (Write) Low Width
/DS Fall to Read Data Req’d
Valid
Read Data to /DS Rise Hold
Time
/DS Rise to Address Active
Delay
/DS Rise to /AS Fall Delay
R//W Valid to /AS Rise
Delay
/DS Rise to R//W Not Valid
Write Data Valid to /DS Fall
(Write) Delay
/DS Rise to Write Data Not
Valid Delay
Address Valid to Read Data
Req’d Valid
/AS Rise to /DS Fall Delay
/DM Valid to /AS Rise Delay
/DS Valid to Address Valid
Hold Time
CC
for a logic 1 and 0.2 V
Parameter
P R E L I M I N A R Y
CC
for a logic 0.
Note [3]
3.5V
3.5V
3.5V
3.5V
3.5V
3.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
5.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
5.5V
3.5V
5.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
5.5V
5.5V
3.5V
5.5V
V
CC
T
Min
200
200
110
110
A
35
35
45
45
55
55
45
55
30
45
45
45
45
45
55
55
45
55
65
65
35
35
35
35
0
0
0
0
= 0 C to 70 C
12 MHz
Max
250
250
150
150
310
310
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS97Z8X1500
Notes
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Zilog