UPSD3422EV-40U6 STMicroelectronics, UPSD3422EV-40U6 Datasheet - Page 120
UPSD3422EV-40U6
Manufacturer Part Number
UPSD3422EV-40U6
Description
MCU 8BIT 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3422EV-40U6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
80KB (80K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5577 - BOARD EVAL USB POWER SWITCH497-5518 - EVAL BOARD RFID READER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4905
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IrDA interface
22.1
120/300
The UART1 serial channel can operate in one of four different modes as shown in
on page 108
used for IrDA communication, UART1 must operate in Mode 1 only, to be compatible with
IrDA protocol up to 115.2k bps. The IrDA interface will support baud rates generated from
Timer 1 or Timer 2, just like standard UART serial communication, but with one restriction.
The transmit baud rate and receive baud rate must be the same (cannot be different rates as
is allowed by standard UART communications).
The IrDA Interface is disabled after a reset and is enabled by setting the IRDAEN Bit in the
SFR named IRDACON
and TxD signals will bypass the internal IrDA logic and instead they are routed directly to the
pins RxD1 and TxD1 respectively. When IrDA is enabled, the IrDA pulse shaping logic is
active and resides between UART1 and the pins RxD1 and TxD1 as shown in
page
Baud rate selection
The IrDA standard only supports 2.4, 9.6, 19.2, and 115.2kbps.
informs the IrDA Interface of the baud rate of UART#1 so that it can perform pulse
modulation properly. It may not be necessary to implement the BR[3:0] bits in the IRDACON
register if the IrDA Interface obtains the proper timing from UART#1.
Table 70.
Table 71.
Table 72.
Bit 7
4-0
7:4
3:2
1:0
Bit
Bit
–
7
6
5
119.
CDIV[4:0]
IRDACON register bit definition (SFR CEh, reset value 0Fh)
IRDACON register bit definition
Baud rate selection register (SFR xxh, reset value xxh)
in
IRDAEN
IRDAEN
IRDAEN
Symbol
Symbol
BR[3:0]
PULSE
PULSE
Bit 6
Section 21: Serial UART interfaces on page
–
(Table 70 on page
PULSE
Bit 5
R,W
R/W
R,W
R,W
R/W
RW
RW
RW
–
Specify Baud Rate (see
IrDA Pulse Modulation Select
Reserved
IrDA Enable
IrDA Pulse Modulation Select
Specify Clock Divider (see
0 = 3/16 bit time pulses (not recommended)
1 = 1.627µs
0 = IrDA Interface is disabled
1 = IrDA is enabled, UART#1 outputs are disconnected from
Port 1 (or Port 4)
0 = IrDA Interface is disabled
1 = IrDA is enabled, UART1 outputs are disconnected from
Port 1 (or Port 4)
0 = 1.627µs
1 = 3/16 bit time pulses
CDIV4
Bit 4
120). When IrDA is disabled, the UART1's RxD
UPSD3422, UPSD3433, UPSD3434, UPSD3454
CDIV3
Bit 3
Table
Definition
Definition
Table 74 on page
107. However, when UART1 is
CDIV2
Bit 2
73)
Table 73 on page 121
CDIV1
Bit 1
122)
Figure 38 on
Table 64
CDIV0
Bit 0
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