Z16F2810VH20EG Zilog, Z16F2810VH20EG Datasheet - Page 334

• Manufacturer Part Number: Z16F2810VH20EG
• Description: IC ZNEO MCU FLASH 128K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810VH20EG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 68-LCC (J-Lead)
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4691-5; Z16F2810VH20EG

®
ZNEO
Z16F Series
Product Specification
318
TDH—Transmit drive high
This control bit causes the interface to drive the line high when a logic 1 is being transmit-
ted. If OE is zero, the line stops being driven when the input is high or at the center of the
bit, whichever is first. If OE is one, the line is driven high for one clock cycle. This bit is
ignored if Debug Mode is zero and the UART is disabled.
0 = Transmit Drive High disabled.
1 = Transmit Drive High enabled.
HDS—High drive strength
This control bit enabled high drive strength for the output driver.
0 = Low Drive Strength
1 = High Drive Strength
TXFC—Transmitter start bit flow control
This control bit enables start bit flow control on the transmitter. The transmitter waits until
a remote device sends a start bit before transmitting its data.
0 = Transmitter start bit flow control disabled.
1 = Transmitter start bit flow control enabled.
NBEN—9-bit mode enable
This control bit enables transmission and reception of a ninth data bit.
0 = Nine bit mode disabled.
1 = Nine bit mode enabled.
NB—Value of ninth bit
This bit is the value of the ninth data bit. When written, this reflects the ninth data bit that
will be transmitted if nine bit mode is enabled. When read, this bit reflects the value of the
ninth bit of the last nine bit character received.
0 = Ninth bit is zero.
1 = Ninth bit is one.
OUT—Output state
This control bit sets the state of the output transceiver. If the UART is enabled, this bit
must be set to one to idle high. Clearing this bit to zero when the UART is enabled will
transmit a break condition. If the UART is disabled, this logic value will be driven onto the
pin if OE is set. This bit is ignored in Debug Mode.
0 = Transmit Break if UART enabled. Drive Low if UART disabled and output enabled.
1 = Idle High if UART enabled. Drive high if UART disabled and output enabled.
PIN—Debug pin
This bit reflects the state of the DBG pin.
0 = DBG pin is Low.
1 = DBG pin is High.
PS022008-0810
P R E L I M I N A R Y
On-Chip Debugger