DSPIC30F6013-30I/PF Microchip Technology, DSPIC30F6013-30I/PF Datasheet - Page 155
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DSPIC30F6013-30I/PF
Manufacturer Part Number
DSPIC30F6013-30I/PF
Description
IC DSPIC MCU/DSP 132K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F6014-20IPF.pdf
(228 pages)
2.DSPIC30F6014-20IPF.pdf
(22 pages)
3.DSPIC30F6014-20IPF.pdf
(28 pages)
Specifications of DSPIC30F6013-30I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
132KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
DSPIC30F601330IPF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6013-30I/PF
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
DSPIC30F6013-30I/PF
Manufacturer:
Microchip
Quantity:
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Quantity:
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20.3.1.1
The oscillator start-up circuitry is not linked to the POR
circuitry. Some crystal circuits (especially low fre-
quency crystals) will have a relatively long start-up
time. Therefore, one or more of the following conditions
is possible after the POR timer and the PWRT have
expired:
• The oscillator circuit has not begun to oscillate.
• The Oscillator Start-up Timer has not expired (if a
• The PLL has not achieved a LOCK (if PLL is
If the FSCM is enabled and one of the above conditions
is true, then a clock failure trap will occur. The device
will automatically switch to the FRC oscillator and the
user can switch to the desired crystal oscillator in the
trap ISR.
20.3.1.2
If the FSCM is disabled and the Power-up Timer
(PWRT) is also disabled, then the device will exit rap-
idly from Reset on power-up. If the clock source is
FRC, LPRC, EXTRC or EC, it will be active
immediately.
If the FSCM is disabled and the system clock has not
started, the device will be in a frozen state at the Reset
vector until the system clock starts. From the user’s
perspective, the device will appear to be in Reset until
a system clock is available.
20.3.2
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit. The main purpose of
the BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (i.e.,
missing portions of the AC cycle waveform due to bad
power transmission lines, or voltage sags due to exces-
sive current draw when a large inductive load is turned
on).
The BOR module allows selection of one of the
following voltage trip points (see Table 23-11):
• 2.6V-2.71V
• 4.1V-4.4V
• 4.58V-4.73V
© 2006 Microchip Technology Inc.
crystal oscillator is used).
used).
Note:
BOR: PROGRAMMABLE
BROWN-OUT RESET
The BOR voltage trip points indicated here
are nominal values provided for design
guidance only. Refer to the Electrical
Specifications in the specific device data
sheet for BOR voltage limit specifications.
POR with Long Crystal Start-up Time
(with FSCM Enabled)
Operating without FSCM and PWRT
dsPIC30F6011/6012/6013/6014
A BOR will generate a Reset pulse which will reset the
device. The BOR will select the clock source based on
the device Configuration bit values (FOS<1:0> and
FPR<3:0>). Furthermore, if an Oscillator mode is
selected, the BOR will activate the Oscillator Start-up
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock will be held
until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the POR time-out (T
time-out (T
is released. If T
used, then a nominal delay of T
The total delay in this case is (T
The BOR status bit (RCON<1>) will be set to indicate
that a BOR has occurred. The BOR circuit, if enabled,
will continue to operate while in Sleep or Idle modes
and will reset the device should V
threshold voltage.
FIGURE 20-6:
Note 1:
Note:
2:
3:
PWRT
Dedicated supervisory devices, such as
the MCP1XX and MCP8XX, may also be
used as an external Power-on Reset
circuit.
D
External Power-on Reset circuit is required
only if the V
The diode D helps discharge the capacitor
quickly when V
R should be suitably chosen so as to make
sure that the voltage drop across R does not
violate the device’s electrical specifications.
R1 should be suitably chosen so as to limit
any current flowing into MCLR from external
capacitor C, in the event of MCLR/V
breakdown due to Electrostatic Discharge
(ESD), or Electrical Overstress (EOS).
PWRT
) will be applied before the internal Reset
V
DD
R
C
= 0 and a crystal oscillator is being
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD
power-up slope is too slow.
DD
R1
powers down.
FSCM
POR
DD
DD
POR
+ T
dsPIC30F
DS70117F-page 153
= 100 s is applied.
MCLR
fall below the BOR
POWER-UP)
) and the PWRT
FSCM
).
PP
pin