PIC32MX675F512L-80I/PF Microchip Technology, PIC32MX675F512L-80I/PF Datasheet - Page 84
![IC MCU 32BIT 512KB FLASH 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC32MX675F512L-80I/PF
Manufacturer Part Number
PIC32MX675F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX675F512L-80I/PF
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
64KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC32MX320F032H-40IPT PDF datasheet
- PIC32MX575F256H-80IMR PDF datasheet #2
- PIC32MX575F256H-80IMR PDF datasheet #3
- PIC32MX575F256H-80IMR PDF datasheet #4
- PIC32MX575F256H-80IPT PDF datasheet #5
- Current page: 84 of 240
- Download datasheet (3Mb)
TABLE 4-26:
TABLE 4-27:
Legend:
Note
Legend:
Note
60A0
60B0
6080
6090
60A0
60B0
6080
6090 PORTC
PORTC
TRISC
ODCC
1:
1:
TRISC
ODCC
LATC
LATC
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORT C REGISTER MAP FOR PIC32MX575F256H, PIC32MX575F512H, PIC32MX675F512H, PIC32MX695F512H, AND
PIC32MX795F512H DEVICES
PORT C REGISTER MAP FOR PIC32MX575F256L, PIC32MX575F512L, PIC32MX675F512L, PIC32MX695F512L, AND
PIC32MX795F512L DEVICES
TRISC15
ODCC15
LATC15
TRISC15
ODCC15
LATC15
31/15
RC15
31/15
RC15
—
—
—
—
—
—
—
—
TRISC14
ODCC14
TRISC14
LATC14
ODCC14
LATC14
30/14
RC14
30/14
RC14
—
—
—
—
—
—
—
—
TRISC13
ODCC13
TRISC13
ODCC13
LATC13
LATC13
29/13
RC13
29/13
RC13
—
—
—
—
—
—
—
—
TRISC12
ODCC12
TRISC12
ODCC12
LATC12
LATC12
28/12
RC12
28/12
RC12
—
—
—
—
—
—
—
—
(1)
(1)
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25/9
25/9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
24/8
24/8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bits
Bits
23/7
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
22/6
22/6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
21/5
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISC4
ODCC4
LATC4
20/4
RC4
20/4
—
—
—
—
—
—
—
—
—
—
—
—
TRISC3
ODCC3
LATC3
19/3
RC3
19/3
—
—
—
—
—
—
—
—
—
—
—
—
TRISC2
ODCC2
LATC2
18/2
RC2
18/2
—
—
—
—
—
—
—
—
—
—
—
—
TRISC1
ODCC1
LATC1
17/1
RC1
17/1
—
—
—
—
—
—
—
—
—
—
—
—
16/0
16/0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
F00F
0000
xxxx
0000
xxxx
0000
0000
0000
F000
0000
xxxx
0000
xxxx
0000
0000
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