PIC32MX675F512L-80I/PF Microchip Technology, PIC32MX675F512L-80I/PF Datasheet - Page 43
![IC MCU 32BIT 512KB FLASH 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC32MX675F512L-80I/PF
Manufacturer Part Number
PIC32MX675F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX675F512L-80I/PF
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
64KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC32MX320F032H-40IPT PDF datasheet
- PIC32MX575F256H-80IMR PDF datasheet #2
- PIC32MX575F256H-80IMR PDF datasheet #3
- PIC32MX575F256H-80IMR PDF datasheet #4
- PIC32MX575F256H-80IPT PDF datasheet #5
- Current page: 43 of 240
- Download datasheet (3Mb)
Co-processor 0 also contains the logic for identifying
and managing exceptions. Exceptions can be caused
by a variety of sources, including alignment errors in
data, external events, or program errors. Table 3-3 lists
the exception types in order of priority.
TABLE 3-3:
2009 Microchip Technology Inc.
Reset
DSS
DINT
NMI
Interrupt
DIB
AdEL
IBE
DBp
Sys
Bp
RI
CpU
CEU
Ov
Tr
DDBL/DDBS
AdEL
AdES
DBE
DDBL
Exception
Assertion MCLR or a Power-on Reset (POR).
EJTAG Debug Single Step.
EJTAG Debug Interrupt. Caused by the assertion of the external EJ_DINT input, or by setting the
EjtagBrk bit in the ECR register.
Assertion of NMI signal.
Assertion of unmasked hardware or software interrupt signal.
EJTAG debug hardware instruction break matched.
Fetch address alignment error.
Fetch reference to protected address.
Instruction fetch bus error.
EJTAG Breakpoint (execution of SDBBP instruction).
Execution of SYSCALL instruction.
Execution of BREAK instruction.
Execution of a Reserved Instruction.
Execution of a co-processor instruction for a co-processor that is not enabled.
Execution of a CorExtend instruction when CorExtend is not enabled.
Execution of an arithmetic instruction that overflowed.
Execution of a trap (when trap condition is true).
EJTAG Data Address Break (address only) or EJTAG Data Value Break on Store (address + value).
Load address alignment error
Load reference to protected address.
Store address alignment error.
Store to protected address.
Load or store bus error.
EJTAG data hardware breakpoint matched in load data compare.
PIC32MX5XX/6XX/7XX FAMILY CORE EXCEPTION TYPES
Preliminary
PIC32MX5XX/6XX/7XX
Description
DS61156B-page 43
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