DSPIC33FJ32MC204-I/ML Microchip Technology, DSPIC33FJ32MC204-I/ML Datasheet - Page 292

• Manufacturer Part Number: DSPIC33FJ32MC204-I/ML
• Description: IC DSPIC MCU/DSP 32K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32MC204-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240002, DM330011, DM330021, MA330017
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
TABLE A-1:
DS70283G-page 292
Section 19.0 “Universal
Asynchronous Receiver Transmitter
(UART)”
Section 20.0 “10-bit/12-bit
Analog-to-Digital Converter (ADC)”
Section 21.0 “Special Features”
Section Name
MAJOR SECTION UPDATES (CONTINUED)
Removed the following sections, which are now available in the related
section of the dsPIC33F/PIC24H Family Reference Manual:
• 18.1 “UART Baud Rate Generator”
• 18.2 “Transmitting in 8-bit Data Mode”
• 18.3 “Transmitting in 9-bit Data Mode”
• 18.4 “Break and Sync Transmit Sequence”
• 18.5 “Receiving in 8-bit or 9-bit Data Mode”
• 18.6 “Flow Control Using UxCTS and UxRTS Pins”
• 18.7 “Infrared Support”
Removed IrDA references and Note 1, and updated the bit and bit value
descriptions for UTXINV (UxSTA<14>) in the UARTx Status and Control
Register (see Register 19-2).
Removed Equation 19-1: ADC Conversion Clock Period and Figure 19-2:
ADC Transfer Function (10-Bit Example).
Added ADC1 Module Block Diagram for dsPIC33FJ16MC304 and
dsPIC33FJ32MC204 Devices (Figure 20-1) and ADC1 Module Block
Diagram FOR dsPIC33FJ32MC202 Devices (Figure 20-2).
Added Note 2 to Figure 20-3: ADC Conversion Clock Period Block Diagram.
Updated ADC Conversion Clock Select bits in the AD1CON3 register from
ADCS<5:0> to ADCS<7:0>. Any references to these bits have also been
updated throughout this data sheet (Register 20-3).
Added device-specific information to Note 1 in the ADC1 Input Scan Select
Register Low (see Register 20-6), and updated the default bit value for bits
12-10 (CSS12-CSS10) from U-0 to R/W-0.
Added device-specific information to Note 1 in the ADC1 Port Configuration
Register Low (see Register 20-7), and updated the default bit value for bits
12-10 (PCFG12-PCFG10) from U-0 to R/W-0.
Added FICD register information for address 0xF8000E in the Device
Configuration Register Map (see Table 21-1).
Added FICD register content (BKBUG, COE, JTAGEN, and ICS<1:0> to the
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 Configuration Bits
Description (see Table 21-2).
Added a note regarding the placement of low-ESR capacitors, after the
second paragraph of Section 21.2 “On-Chip Voltage Regulator” and to
Figure 19-1.
Removed the words “if enabled” from the second sentence in the fifth
paragraph of Section 21.3 “BOR: Brown-Out Reset”.
Preliminary
Update Description
 2009 Microchip Technology Inc.