PIC16C433-I/P Microchip Technology, PIC16C433-I/P Datasheet - Page 53

• Manufacturer Part Number: PIC16C433-I/P
• Description: IC MCU CMOS 8BIT 10MHZ 2K 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C433-I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• For Use With: DVA16XP185 - ADAPTER DEVICE ICE 18DIP/SOICAC164030 - MODULE SKT PROMATEII 28DIP/SOICDVA16XP140 - ADAPTER DEVICE FOR MPLAB-ICE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

9.0
What sets a microcontroller apart from other proces-
sors are special circuits to deal with the needs of real-
time applications. The PIC16C433 device has a host of
such features intended to maximize system reliability,
minimize cost through elimination of external compo-
nents, provide power saving operating modes and offer
code protection. These are:
• Oscillator Selection
• RESET
• Interrupts
• Watchdog Timer (WDT)
• SLEEP
• Code Protection
• ID Locations
• In-Circuit Serial Programming
The PIC16C433 has a Watchdog Timer, which can be
shut-off only through configuration bits. It runs off its
own RC oscillator for added reliability. There are two
timers that offer necessary delays on power-up. One is
the Oscillator Start-up Timer (OST), intended to keep
REGISTER 9-1:
 2002 Microchip Technology Inc.
bit13
bit 13-8, 6-5:
bit 7:
bit 4:
bit 3:
bit 2-0:
Legend
R = Readable bit
-n = Value at POR
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
CP
Note:
SPECIAL FEATURES OF THE
CPU
CP
CP<1:0>: Code Protection bit pairs
11 = Code protection off
10 = Locations 400h through 7FEh code protected
01 = Locations 200h through 7FEh code protected
00 = All memory is code protected
MCLRE: Master Clear Reset Enable bit
1 = Master Clear enabled
0 = Master Clear disabled
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC<2:0>: Oscillator Selection bits
111 = EXTRC, clockout on OSC2
110 = EXTRC, OSC2 is I/O
101 = INTRC, clockout on OSC2
100 = INTRC, OSC2 is I/O
011 = Invalid selection
010 = HS oscillator
001 = XT oscillator
000 = LP oscillator
All of the CP<1:0> pairs have to be given the same value to enable the code protection scheme listed.
BORV1
CONFIG — CONFIGURATION WORD (ADDRESS: 2007H)
BORV0
W = Writable bit
1 = bit is set
CP
(1)
CP
Preliminary
—
BODEN
U = Unimplemented bit, read as ‘0’
0 = bit is cleared
the chip in RESET until the crystal oscillator is stable.
The other is the Power-up Timer (PWRT), which pro-
vides a fixed delay of 72 ms (nominal) on power-up
only, designed to keep the part in RESET while the
power supply stabilizes. With these two timers on-chip,
most applications need no external RESET circuitry.
SLEEP mode is designed to offer a very low current
Power-down mode. The user can wake-up from
SLEEP through external RESET, Watchdog Timer
wake-up, or through an interrupt. Several oscillator
options are also made available to allow the part to fit
the application. The INTRC/EXTRC oscillator option
saves system cost, while the LP crystal option saves
power. A set of configuration bits is used to select vari-
ous options.
9.1
The configuration bits can be programmed (read as '0'),
or left unprogrammed (read as '1'), to select various
device configurations. These bits are mapped in pro-
gram memory location 2007h.
The user will note that address 2007h is beyond the
user program memory space. In fact, it belongs to the
special test/configuration memory space (2000h-
3FFFh),
programming.
MCLRE
Configuration Bits
which
PWRTE
can
WDTE
be
PIC16C433
x = bit is unknown
accessed
FOSC2
DS41139B-page 51
FOSC1
only
during
FOSC0
bit0