PIC24FJ32GA002-E/ML Microchip Technology, PIC24FJ32GA002-E/ML Datasheet - Page 97
![IC PIC MCU FLASH 32K 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24FJ32GA002-E/ML
Manufacturer Part Number
PIC24FJ32GA002-E/ML
Description
IC PIC MCU FLASH 32K 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
4.PIC24FJ64GA004-EPT.pdf
(262 pages)
Specifications of PIC24FJ32GA002-E/ML
Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ32GA002-E/ML
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC24FJ32GA002-E/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- PIC24FJ64GA004-EPT PDF datasheet #4
- Current page: 97 of 268
- Download datasheet (2Mb)
8.3
The operation of the oscillator is controlled by three
Special Function Registers:
• OSCCON
• CLKDIV
• OSCTUN
The OSCCON register (Register 8-1) is the main con-
trol register for the oscillator. It controls clock source
switching and allows the monitoring of clock sources.
REGISTER 8-1:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
Note 1:
CLKLOCK
R/SO-0
U-0
—
2:
3:
Control Registers
Reset values for these bits are determined by the FNOSC Configuration bits.
The state of the IOLOCK bit can only be changed once an unlocking sequence has been executed. In
addition, if the IOL1WAY Configuration bit is ‘1’ once the IOLOCK bit is set, it cannot be cleared.
Also resets to ‘0’ during any valid clock switch or whenever a non-PLL Clock mode is selected.
Unimplemented: Read as ‘0’
COSC2:COSC0: Current Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC2:NOSC0: New Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
IOLOCK
COSC2
R/W-0
R-0
OSCCON: OSCILLATOR CONTROL REGISTER
(2)
CO = Clear Only bit
W = Writable bit
‘1’ = Bit is set
COSC1
LOCK
R-0
R-0
(3)
COSC0
R-0
U-0
PIC24FJ64GA004 FAMILY
—
SO = Set Only bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
R/CO-0
The Clock Divider register (Register 8-2) controls the
features associated with Doze mode, as well as the
postscaler for the FRC oscillator.
The FRC Oscillator Tune register (Register 8-3) allows
the user to fine tune the FRC oscillator over a range of
approximately ±12%. Each bit increment or decrement
changes the factory calibrated frequency of the FRC
oscillator by a fixed amount.
U-0
CF
—
R/W-x
NOSC2
U-0
—
(1)
x = Bit is unknown
SOSCEN
R/W-x
NOSC1
R/W-0
(1)
DS39881D-page 97
R/W-x
OSWEN
NOSC0
R/W-0
(1)
bit 8
bit 0
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