PIC18LF2321-I/SS Microchip Technology, PIC18LF2321-I/SS Datasheet - Page 277
![IC PIC MCU FLASH 4KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18LF2321-I/SS
Manufacturer Part Number
PIC18LF2321-I/SS
Description
IC PIC MCU FLASH 4KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(402 pages)
3.PIC18F2221-ISO.pdf
(8 pages)
4.PIC18F2221-ISO.pdf
(30 pages)
5.PIC18F2221-ISO.pdf
(46 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2321-I/SS
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18F2221-ISO PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 277 of 402
- Download datasheet (7Mb)
24.5.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits internal and external writes to data
EEPROM. The CPU can always read data EEPROM
under normal operation, regardless of the protection bit
settings.
24.5.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In normal execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP
operation or an external programmer.
24.6
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions
or during program/verify. The ID locations can be read
when the device is code-protected.
24.7
PIC18F2221/2321/4221/4321 family microcontrollers
can be serially programmed while in the end applica-
tion circuit. This is simply done with two lines for clock
and data and three other lines for power, ground and
the programming voltage. This allows customers to
manufacture boards with unprogrammed devices and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
24.8
When the DEBUG Configuration bit is programmed to
a ‘0’, the In-Circuit Debugger functionality is enabled.
This function allows simple debugging functions when
used with MPLAB
this feature enabled, some resources are not available
for general use. Table 24-4 shows which resources are
required by the background debugger.
TABLE 24-4:
© 2009 Microchip Technology Inc.
I/O Pins:
Stack:
Program Memory:
Data Memory:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
®
DEBUGGER RESOURCES
IDE. When the microcontroller has
PIC18F2221/2321/4221/4321 FAMILY
RB6, RB7
2 levels
512 bytes
10 bytes
To use the In-Circuit Debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to MCLR/V
V
Debugger module available from Microchip or one of
the third party development tool companies.
24.9
The LVP Configuration bit enables Single-Supply ICSP
Programming (formerly known as Low-Voltage ICSP
Programming or LVP). When Single-Supply Program-
ming is enabled, the microcontroller can be programmed
without requiring high voltage being applied to the
MCLR/V
dedicated to controlling Program mode entry and is not
available as a general purpose I/O pin.
While programming, using Single-Supply Program-
ming, V
normal execution mode. To enter Programming mode,
V
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared. RB5/KBI1/PGM then
becomes available as the digital I/O pin, RB5. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required. If a block erase is to
be
Programming, the device must be supplied with V
4.5V to 5.5V.
SS
DD
PP
Note 1: High-voltage programming is always
, RB7 and RB6. This will interface to the In-Circuit
/RE3 pin). Once LVP has been disabled, only the
is applied to the PGM pin.
performed
DD
PP
2: By default, Single-Supply ICSP Program-
3: When Single-Supply ICSP Programming
4: When LVP is enabled, externally pull the
Single-Supply ICSP Programming
/RE3 pin, but the RB5/KBI1/PGM pin is then
is applied to the MCLR/V
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
ming is enabled in unprogrammed
devices (as supplied from Microchip) and
erased devices.
is enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
DD
when
. If code-protected memory is to be
using
SS
to allow normal program
IHH
applied to the MCLR/
Low-Voltage
DS39689F-page 277
PP
/RE3 pin as in
PP
/RE3, V
ICSP
DD
IHH
DD
of
,
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