PIC12F615-I/MD Microchip Technology, PIC12F615-I/MD Datasheet - Page 89

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PIC12F615-I/MD

Manufacturer Part Number
PIC12F615-I/MD
Description
IC PIC MCU FLASH 1KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F615-I/MD

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
3
Digital Ic Case Style
DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
10.4.3
The PWM mode supports an Auto-Shutdown mode that
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
ECCPASx bits of the ECCPAS register. A shutdown
event may be generated by:
• A logic ‘0’ on the INT pin
• Comparator
• Setting the ECCPASE bit in firmware
FIGURE 10-10:
© 2006 Microchip Technology Inc.
From Comparator
INT
ENHANCED PWM AUTO-
SHUTDOWN MODE
ECCPAS<2:0>
AUTO-SHUTDOWN BLOCK DIAGRAM
111
110
101
100
011
010
001
000
From Data Bus
Write to ECCPASE
PRSEN
PIC12F609/615/12HV609/615
Preliminary
R
D
Q
S
A shutdown condition is indicated by the ECCPASE
(Auto-Shutdown Event Status) bit of the ECCPAS
register. If the bit is a ‘0’, the PWM pins are operating
normally. If the bit is a ‘1’, the PWM outputs are in the
shutdown state. Refer to Figure 1.
When a shutdown event occurs, two things happen:
The ECCPASE bit is set to ‘1’. The ECCPASE will
remain set until cleared in firmware or an auto-restart
occurs (see Section 10.4.4 “Auto-Restart Mode”).
The enabled PWM pins are asynchronously placed in
their shutdown states. The PWM output pins are
grouped into pairs [P1A/P1C] and [P1B/P1D]. The state
of each pin pair is determined by the PSSAC and
PSSBD bits of the ECCPAS register. Each pin pair may
be placed into one of three states:
• Drive logic ‘1’
• Drive logic ‘0’
• Tri-state (high-impedance)
ECCPASE
PSSAC<1>
PSSBD<1>
PSSAC<0>
P1A_DRV
PSSBD<0>
P1B_DRV
TRISx
TRISx
1
0
1
0
DS41302A-page 87
P1A
P1B

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