DS80C320-QCG+ Maxim Integrated Products, DS80C320-QCG+ Datasheet - Page 29

IC MCU HI SPEED 25MHZ 44-PLCC

DS80C320-QCG+

Manufacturer Part Number
DS80C320-QCG+
Description
IC MCU HI SPEED 25MHZ 44-PLCC
Manufacturer
Maxim Integrated Products
Series
80Cr
Datasheet

Specifications of DS80C320-QCG+

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-LCC, 44-PLCC
Controller Family/series
(8051) 8052
No. Of I/o's
32
Ram Memory Size
256Byte
Cpu Speed
25MHz
No. Of Timers
3
Embedded Interface Type
UART
Digital Ic Case Style
LCC
Rohs Compliant
Yes
Processor Series
DS80C320
Core
8051
Data Bus Width
8 bit
Program Memory Size
64 KB
Data Ram Size
64 KB
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.25 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
For Use With
MCBX51 - BOARD EVALUATION 8051/251 44PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
EXTERNAL CLOCK CHARACTERISTICS
SERIAL PORT MODE 0 TIMING CHARACTERISTICS
EXPLANATION OF AC SYMBOLS
In an effort to remain compatible with the original 8051 family, this device specifies the same parameter as such
devices, using the same symbols. For completeness, the following is an explanation of the symbols.
Clock High Time
Clock Low Time
Clock Rise Time
Clock Fall Time
Serial Port Clock
Cycle Time
Output Data Setup to
Clock Rising Edge
Output Data Hold
from Clock Rising
Input Data Hold After
Clock Rising
Clock Rising Edge to
Input Data Valid
PARAMETER
t
A
C
D
H
L
I
P
PARAMETER
Time
Address
Clock
Input data
Logic level high
Logic level low
Instruction
PSEN
SYMBOL
t
t
t
t
t
QVXH
XHQX
XHDX
XHDV
XLXL
SYMBOL
t
t
t
t
CHCX
CLCX
CLCH
CHCL
SM2 = 0;
12 clocks per cycle
SM2 = 1;
4 clocks per cycle
SM2 = 0
12 clocks per cycle
SM2 = 1;
4 clocks per cycle
SM2 = 0
12 clocks per cycle
SM2 = 1;
4 clocks per cycle
SM2 = 0;
12 clocks per cycle
SM2 = 1;
4 clocks per cycle
SM2 = 0;
12 clocks per cycle
SM2 = 1
4 clocks per cycle
CONDITIONS
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
MIN
10
10
29 of 38
Q
R
V
W
X
Z
TYP
Output data
Valid
No longer a valid logic level
Tri-state
RD
WR
MIN
signal
signal
MAX
5
5
12t
10t
11t
4t
3t
2t
2t
TYP
t
t
t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
UNITS
MAX
ns
ns
ns
ns
UNITS
ns
ns
ns
ns
ns

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