DS80C323-MCD+ Maxim Integrated Products, DS80C323-MCD+ Datasheet - Page 19

• Manufacturer Part Number: DS80C323-MCD+
• Description: IC MCU HI SPEED 18MHZ 40-DIP
• Manufacturer: Maxim Integrated Products
• Series: 80Cr

Specifications of DS80C323-MCD+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: 80C
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Data Ram Size: 64 KB
• Interface Type: UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Controller Family/series: (8051) 8052
• No. Of I/o's: 32
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• No. Of Timers: 3
• Embedded Interface Type: UART
• Rohs Compliant: Yes
• Package: 40PDIP
• Device Core: 8051
• Family Name: 80C
• Maximum Speed: 18 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 4. Ring Oscillator Startup
TIMED ACCESS PROTECTION
Selected SFR bits are critical to operation, making it desirable to protect against an accidental write
operation. The Timed Access procedure prevents an errant CPU from accidentally altering a bit that
would cause difficulty. The Timed Access procedure requires that the write of a protected bit be preceded
by the following instructions:
By writing an AAh followed by a 55h to the Timed Access register (location C7h), the hardware opens a
three-cycle window that allows software to modify one of the protected bits. If the instruction that seeks
to modify the protected bit is not immediately proceeded by these instructions, the write will not take
effect. The protected bits are:
MOV
MOV
EXIF.0
WDCON.6
WDCON.1
WDCON.0
WDCON.3
DIAGRAM ASSUMES THAT THE OPERATION FOLLOWING STOP REQUIRES LESS THAN 18ms COMPLETE.
0C7h, #0AAh
0C7h, #55h
BGS Bandgap Select
POR Power-on Reset flag
EWT Enable Watchdog
RWT Reset Watchdog
WDIF Watchdog Interrupt Flag
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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