DS80C323-MCD+ Maxim Integrated Products, DS80C323-MCD+ Datasheet - Page 13

• Manufacturer Part Number: DS80C323-MCD+
• Description: IC MCU HI SPEED 18MHZ 40-DIP
• Manufacturer: Maxim Integrated Products
• Series: 80Cr

Specifications of DS80C323-MCD+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: 80C
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Data Ram Size: 64 KB
• Interface Type: UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Controller Family/series: (8051) 8052
• No. Of I/o's: 32
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• No. Of Timers: 3
• Embedded Interface Type: UART
• Rohs Compliant: Yes
• Package: 40PDIP
• Device Core: 8051
• Family Name: 80C
• Maximum Speed: 18 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DUAL DATA POINTER
Data memory block moves can be accelerated using the Dual Data Pointer (DPTR). The standard 8032
DPTR is a 16-bit value that is used to address off-chip data RAM or peripherals. In the
DS80C320/DS80C323, the standard 16-bit data pointer is called DPTR0 and is located at SFR addresses
82h and 83h. These are the standard locations. The new DPTR is located at SFR 84h and 85h and is
called DPTR1. The DPTR Select bit (DPS) chooses the active pointer and is located at the LSB of the
SFR location 86h. No other bits in register 86h have any effect and are set to 0. The user switches
between data pointers by toggling the LSB of register 86h. The increment (INC) instruction is the fastest
way to accomplish this. All DPTR-related instructions use the currently selected DPTR for any activity.
Therefore only one instruction is required to switch from a source to a destination address. Using the
Dual-Data Pointer saves code from needing to save source and destination addresses when doing a block
move. Once loaded, the software simply switches between DPTR and 1. The relevant register locations
are as follows.
Sample code listed below illustrates the saving from using the dual DPTR. The example program was
original code written for an 8051 and requires a total of 1869 DS80C320/DS80C323 machine cycles. This
takes 299s to execute at 25MHz. The new code using the Dual DPTR requires only 1097 machine
cycles taking 175.5s. The Dual DPTR saves 772 machine cycles or 123.5s for a 64-byte block move.
Since each pass through the loop saves 12 machine cycles when compared to the single DPTR approach,
larger blocks gain more efficiency using this feature.
64-Byte Block Move without Dual Data Pointer
; SH and SL are high and low byte source address.
; DH and DL are high and low byte of destination address.
MOV
MOV
MOV
MOV
MOV
MOV
MOVE:
; THIS LOOP IS PERFORMED THE NUMBER OF TIMES LOADED INTO R5, IN THIS EXAMPLE 64
MOVX
MOV
MOV
MOV
MOV
MOVX
INC
MOV
MOV
MOV
MOV
INC
DJNZ
R5, #64d
DPTR, #SHSL
R1, #SL
R2, #SH
R3, #DL
R4, #DH
A, @DPTR
R1, DPL
R2, DPH
DPL, R3
DPH, R4
@DPTR, A
DPTR
R3, DPL
R4, DPH
DPL, R1
DPH, R2
DPTR
R5, MOVE
DPL
DPH
DPL1 84h
DPH1 85h
DPS
; NUMBER OF BYTES TO MOVE
; LOAD SOURCE ADDRESS
; SAVE LOW BYTE OF SOURCE
; SAVE HIGH BYTE OF SOURCE
; SAVE LOW BYTE OF DESTINATION
; SAVE HIGH BYTE OF DESTINATION
; READ SOURCE DATA BYTE
; SAVE NEW SOURCE POINTER
;
; LOAD NEW DESTINATION
;
; WRITE DATA TO DESTINATION
; NEXT DESTINATION ADDRESS
; SAVE NEW DESTINATION POINTER
;
; GET NEW SOURCE POINTER
;
; NEXT SOURCE ADDRESS
; FINISHED WITH TABLE?
82h
83h
86h
Low byte original DPTR
High byte original DPTR
Low byte new DPTR
High byte new DPTR
DPTR Select (LSB)
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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# CYCLES
2
3
2
2
2
2
2
2
2
2
2
2
3
2
2
2
2
3
3