MC68332ACEH20 Freescale Semiconductor, MC68332ACEH20 Datasheet - Page 160
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MC68332ACEH20
Manufacturer Part Number
MC68332ACEH20
Description
IC MCU 32BIT 20MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Specifications of MC68332ACEH20
Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, UART
Minimum Operating Temperature
- 40 C
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
20MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Data Ram Size
2 KB
Number Of Programmable I/os
15
Number Of Timers
16
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Program Memory Size
Not Required
Total Internal Ram Size
2KB
# I/os (max)
15
Number Of Timers - General Purpose
16
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68332ACEH20
Manufacturer:
MOTOROLA
Quantity:
1 000
Company:
Part Number:
MC68332ACEH20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
7.4 Standard and Enhanced Standard Time Functions
7.4.1 Discrete Input/Output (DIO)
7.4.2 Input Capture/Input Transition Counter (ITC)
7.4.3 Output Compare (OC)
7-6
The following paragraphs describe factory-programmed time functions implemented
in standard and enhanced standard TPU microcode ROM. A complete description of
the functions is beyond the scope of this manual. Refer to the TPU Reference Manual
(TPURM/AD) for additional information.
When a pin is used as a discrete input, a parameter indicates the current input level
and the previous 15 levels of a pin. Bit 15, the most significant bit of the parameter,
indicates the most recent state. Bit 14 indicates the next most recent state, and so on.
The programmer can choose one of the three following conditions to update the pa-
rameter: 1) when a transition occurs, 2) when the CPU makes a request, or 3) when a
rate specified in another parameter is matched. When a pin is used as a discrete out-
put, it is set high or low only upon request by the CPU.
Any channel of the TPU can capture the value of a specified TCR upon the occurrence
of each transition or specified number of transitions, and then generate an interrupt re-
quest to notify the CPU. A channel can perform input captures continually, or a chan-
nel can detect a single transition or specified number of transitions, then cease
channel activity until reinitialization. After each transition or specified number of tran-
sitions, the channel can generate a link to a sequential block of up to eight channels.
The user specifies a starting channel of the block and the number of channels within
the block. The generation of links depends on the mode of operation. In addition, after
each transition or specified number of transitions, one byte of the parameter RAM (at
an address specified by channel parameter) can be incremented and used as a flag
to notify another channel of a transition.
The output compare function generates a rising edge, falling edge, or a toggle of the
previous edge in one of three ways:
This algorithm generates a 50% duty-cycle continuous square wave with each high/
low time equal to the calculated OFFSET. Due to offset calculation, there is an initial
link time before continuous pulse generation begins.
1. Immediately upon CPU initiation, thereby generating a pulse with a length equal
2. At a programmable delay time from a user-specified time.
3. Continuously. Upon receiving a link from a channel, OC references, without
to a programmable delay time.
CPU interaction, a specifiable period and calculates an offset:
where Ratio is a parameter supplied by the user.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
TIME PROCESSOR UNIT
Offset
=
Period Ratio
USER’S MANUAL
MC68332