MC56F8346MFVE Freescale Semiconductor, MC56F8346MFVE Datasheet - Page 69

• Manufacturer Part Number: MC56F8346MFVE
• Description: IC DSP 16BIT 60MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8346MFVE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 62
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 62
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
GPIOA_IENR
GPIOA_IPOLR
GPIOA_IPR
GPIOA_IESR
GPIOA_PUR
GPIOA_DR
GPIOA_DDR
GPIOA_PER
GPIOA_IAR
Table 4-26 Serial Peripheral Interface 1 Registers Address Map (Continued)
Register Acronym
PLLCR
PLLDB
PLLSR
SHUTDOWN
OSCTL
SPI1_SPDTR
COPCTL
COPTO
COPCTR
Register Acronym
Register Acronym
Register Acronym
Table 4-27 Computer Operating Properly Registers Address Map
Table 4-28 Clock Generation Module Registers Address Map
Table 4-29 GPIOA Registers Address Map
Address Offset
Address Offset
Address Offset
Address Offset
$0
$1
$2
$3
$4
$5
$6
$7
$8
(CLKGEN_BASE = $00 F2D0)
(GPIOA_BASE = $00 F2E0)
$0
$1
$2
$4
$5
(SPI1_BASE = $00 F2B0)
(COP_BASE = $00 F2C0)
$0
$1
$2
$3
56F8346 Technical Data, Rev. 15
Pull-up Enable Register
Data Register
Data Direction Register
Peripheral Enable Register
Interrupt Assert Register
Interrupt Enable Register
Interrupt Polarity Register
Interrupt Pending Register
Interrupt Edge-Sensitive Register
Control Register
Divide-By Register
Status Register
Reserved
Shutdown Register
Oscillator Control Register
Control Register
Time Out Register
Counter Register
Data Transmitter Register
Register Description
Register Description
Register Description
Register Description
Peripheral Memory Mapped Registers
Reset Value
0 x 3FFF
0 x 3FFF
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
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