MC56F8346MFVE Freescale Semiconductor, MC56F8346MFVE Datasheet - Page 17

• Manufacturer Part Number: MC56F8346MFVE
• Description: IC DSP 16BIT 60MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8346MFVE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 62
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 62
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F8346 and 56F8146 are organized into functional groups, as detailed
in
present on a pin.
Freescale Semiconductor
Preliminary
Table 2-1
1. If the on-chip regulator is disabled, the V
2. Alternately, can function as Quad Timer pins or GPIO
3. Pins in this section can function as Quad Timer, SPI #1, or GPIO
Power (V
Power Option Control
Ground (V
Supply Capacitors
PLL and Clock
Address Bus
Data Bus
Bus Control
Interrupt and Program Control
Pulse Width Modulator (PWM) Ports
Serial Peripheral Interface (SPI) Port 0
Serial Peripheral Interface (SPI) Port 1
Quadrature Decoder Port 0
Quadrature Decoder Port 1
Serial Communications Interface (SCI) Ports
CAN Ports
Analog to Digital Converter (ADC) Ports
Quad Timer Module Ports
JTAG/Enhanced On-Chip Emulation (EOnCE)
Temperature Sense
Dedicated GPIO
and as illustrated in
DD
SS
or V
or V
DDA
SSA
1
& V
)
)
PP
Functional Group
Table 2-1 Functional Group Pin Allocations
2
3
Figure
56F8346 Technical Data, Rev. 15
CAP
2-1. In
pins serve as 2.5V V
Table
2-2, each table row describes the signal or signals
DD_CORE
power inputs
56F8346
Number of Pins in Package
17
16
25
21
—
—
9
1
6
6
4
6
6
4
4
4
4
2
3
5
1
56F8146
17
16
13
21
—
—
—
9
1
6
6
4
6
6
4
4
4
4
1
5
5
Introduction
17