C8051F022-GQ Silicon Laboratories Inc, C8051F022-GQ Datasheet - Page 190

• Manufacturer Part Number: C8051F022-GQ
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F02xr

Specifications of C8051F022-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F020DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 8-bit or 8-ch x 10-bit
• On-chip Dac: 2-ch x 12-bit
• No. Of I/o's: 64
• Ram Memory Size: 4352Byte
• Cpu Speed: 25MHz
• No. Of Timers: 5
• Rohs Compliant: Yes
• Cpu Family: C8051F02x
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 25MHz
• Total Internal Ram Size: 4.25KB
• # I/os (max): 64
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1200 - DEV KIT FOR F020/F021/F022/F023
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1202

C8051F020/1/2/3
Setting the SMBus0 Free Timer Enable bit (FTE, SMB0CN.1) to logic 1 enables the timer in SMB0CR. When SCL
goes high, the timer in SMB0CR counts up. A timer overflow indicates a free bus timeout: if SMBus0 is waiting to
generate a START, it will do so after this timeout. The bus free period should be less than 50 µs (see Figure 18.9,
SMBus0 Clock Rate Register).
When the TOE bit in SMB0CN is set to logic 1, Timer 3 is used to detect SCL low timeouts. If Timer 3 is enabled
(see
Section “22.2. Timer 3” on page
240), Timer 3 is forced to reload when SCL is high, and forced to count when
SCL is low. With Timer 3 enabled and configured to overflow after 25 ms (and TOE set), a Timer 3 overflow indi-
cates a SCL low timeout; the Timer 3 interrupt service routine can then be used to reset SMBus0 communication in
the event of an SCL low timeout.
190
Rev. 1.4