HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 82
HD64F3664FPV
Manufacturer Part Number
HD64F3664FPV
Description
IC H8/3664 MCU FLASH 32K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of HD64F3664FPV
Core Size
16-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
External
Core Processor
H8/300H
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
No. Of I/o's
29
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3664FPV
Manufacturer:
MURATA
Quantity:
34 000
Company:
Part Number:
HD64F3664FPV
Manufacturer:
HD
Quantity:
465
Company:
Part Number:
HD64F3664FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3664FPV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Section 3 Exception Handling
Table 3.1
Rev. 6.00 Mar. 24, 2006 Page 52 of 412
REJ09B0142-0600
Relative Module
RES pin
Watchdog timer
External interrupt
pin
CPU
Address break
CPU
External interrupt
pin
Timer A
Timer W
Timer V
SCI3
IIC
A/D converter
Exception Sources and Vector Address
Overflow
Exception Sources
Reset
Reserved for system use
NMI
Trap instruction (#0)
Break conditions satisfied
Direct transition by executing the
SLEEP instruction
IRQ0
IRQ1
IRQ2
IRQ3
WKP
Reserved for system use
Input capture A/compare match A
Input capture B/compare match B
Input capture C/compare match C
Input capture D/compare match D
Timer W overflow
Timer V compare match A
Timer V compare match B
Timer V overflow
SCI3 receive data full
SCI3 transmit data empty
SCI3 transmit end
SCI3 receive error
Data transfer end
Address inequality
Stop conditions detected
A/D conversion end
(#1)
(#2)
(#3)
Vector
Number Vector Address
0
1 to 6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
H'0000 to H'0001
H'0002 to H'000D
H'000E to H'000F
H'0010 to H'0011
H'0012 to H'0013
H'0014 to H'0015
H'0016 to H'0017
H'0018 to H'0019
H'001A to H'001B
H'001C to H'001D
H'001E to H'001F
H'0020 to H'0021
H'0022 to H'0023
H'0024 to H'0025
H'0026 to H'0027
H'0028 to H'0029
H'002A to H'002B
H'002C to H'002D
H'002E to H'002F
H'0030 to H'0031
H'0032 to H'0033
High
Low
Priority
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