MCF52232CAF50 Freescale Semiconductor, MCF52232CAF50 Datasheet - Page 25

IC MCU 32BIT 128K FLASH 80-LQFP

MCF52232CAF50

Manufacturer Part Number
MCF52232CAF50
Description
IC MCU 32BIT 128K FLASH 80-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5223xr
Datasheet

Specifications of MCF52232CAF50

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Cpu Family
MCF5223x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
50MHz
Interface Type
I2C/QSPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
10
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
32 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
56
Number Of Timers
10
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52235EVB, M52233DEMO
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Quantity
Price
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1.12
Table 13
1.13
Table 14
1.14
Table 15
1.15
These signals are used as the interface to the on-chip JTAG controller and also to interface to the BDM logic.
Freescale Semiconductor
General Purpose Timer
PWM Output Channels
Test Mode Select
Test Data Input
describes the signals of the Analog-to-Digital Converter.
describes the General Purpose Timer Signals.
describes the PWM signals.
Signal Name
JTAG Enable
Signal Name
Signal Name
Analog Reference
Input/Output
Test Reset
Test Clock
ADC Signals
General Purpose Timer Signals
Pulse Width Modulator Signals
Debug Support Signals
Analog Supply
Analog Inputs
Signal Name
Abbreviation
Abbreviation
Abbreviation
PWM[7:0]
JTAG_EN
GPT[3:0]
Abbreviation
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
TRST
TCLK
TMS
TDI
AN[7:0]
V
V
V
V
DDA
SSA
RH
RL
Table 16. Debug Support Signals
Inputs to or outputs from the general purppose timer module
Pulse width modulated output for PWM channels
Select between debug module and JTAG signals at reset
This active-low signal is used to initialize the JTAG logic
asynchronously.
Used to synchronize the JTAG logic.
Used to sequence the JTAG state machine. TMS is sampled on the
rising edge of TCLK.
Serial input for test instructions and data. TDI is sampled on the rising
edge of TCLK.
Inputs to the A-to-D converter.
Reference voltage high and low inputs.
Isolate the ADC circuitry from power supply noise
Table 15. PWM Signals
Table 13. ADC Signals
Table 14. GPT Signals
Function
Function
Function
Function
MCF52235 Family Configurations
I/O
I
I
I
I/O
I/O
I/O
I/O
O
I
I
I
I
I
25

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