R5F21237DFP#U0 Renesas Electronics America, R5F21237DFP#U0 Datasheet - Page 509
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/18/121887/r5f21237dfp_u0_sml.jpg)
R5F21237DFP#U0
Manufacturer Part Number
R5F21237DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21237DFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 22.8
Figure 22.9
Figure 22.10
fCAN
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
CPU read signal
Updating period of
the CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
1
0: CAN operation
1: CAN reset/initiall-
0: CAN operation
1: CAN reset/initiall-
: CAN reset/initial-
mode
ization mode
mode
ization mode
mode
ization mode
When Polling Period of CPU is 3fCAN or Longer
When Updating Period of CAN Module Matches Access Period from CPU
With a Wait Time of 3fCAN Before CPU Read
Page 487 of 501
Wait time
: Updated without fail in period of 3fCAN
: When the CAN module’s State_Reset bit updating period matches the CPU’s read
: When the CAN module’s State_Reset bit updating period matches the CPU’s read
: Updated without fail in period of 4fCAN
period, it does not enter reset mode, for the CPU read has the higher priority.
period, it does not enter reset mode, for the CPU read has the higher priority.
4fCAN
22. Usage Notes
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